High-K Metal Gate Threshold Voltage Variation Reduction
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Solution Overview
Problem
CMOS devices with high-k metal gate structures face variability in threshold voltage due to metal grain granularity and random distribution of positively charged oxygen vacancies, leading to inconsistent device performance.
Innovation Solution
A method is introduced to form a high-k layer with controlled oxygen vacancy concentration by performing a thermal anneal process, which balances the workfunction granularity of the metal layers, reducing threshold voltage variations by concentrating oxygen vacancies beneath high workfunction grain portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-k metal gate structures are used in CMOS devices, then the gate dielectric performance is improved, but threshold voltage variation increases due to metal grain granularity and oxygen vacancy distribution
Solution Approach 1:
The patent applies local quality by creating spatially varying oxygen vacancy concentrations in the high-k dielectric layer. Specifically, oxygen vacancies are concentrated beneath high workfunction grain portions of the metal gate, while being depleted beneath low workfunction grain portions. This localized modification of oxygen vacancy distribution compensates for the non-uniform workfunction caused by metal grain granularity, thereby reducing overall threshold voltage variation while maintaining the high gate dielectric performance.
2Manufacturing precision
If thermal anneal process is performed to control oxygen vacancies, then threshold voltage variation is reduced, but process complexity increases
Solution Approach 1:
The patent employs parameter changes by utilizing thermal annealing to modify the concentration and spatial distribution of oxygen vacancies in the high-k dielectric layer. By controlling annealing temperature, time, and atmosphere parameters, the process transforms the initial uniform oxygen vacancy distribution into a non-uniform distribution that is concentrated beneath high workfunction grain portions. This parameter transformation enables threshold voltage uniformity improvement through a single established process step, avoiding the need for multiple additional fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces threshold voltage variations in CMOS devices by canceling out the effects of metal grain granularity, resulting in more consistent device performance compared to conventional high-k metal gate stacks.
Implementation Method 1
performing a thermal anneal process so as to control a concentration of oxygen vacancies in the high-k layer
Data Source
AI summary
A semiconductor device having a reduced variation in threshold voltage includes a semiconductor substrate with a high dielectric-constant (high-k) layer deposited in a gate trench and on a semiconductor portion of the substrate. At least one workfunction layer has an arrangement of first and second workfunction granular portions on an upper surface of the high-k layer to define a workfunction of the semiconductor device. The arrangement of first and second workfunction granular portions define a granularity of the at least one workfunction layer. A gate contact material fills the gate trench, wherein the high-k layer has a concentration of oxygen vacancies based on the granularity of the at least one work function metal layer so as to reduce the variation in the threshold voltage.