High-k Dielectric Liners for Shallow Trench Isolation Leakage

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Solution Overview

Problem

The formation of shallow trench isolation (STI) regions using high-aspect ratio process (HARP) leads to less dense STI regions, which are prone to excessive etching and leakage issues in CMOS image sensor chips due to p-type impurity diffusion during high-temperature annealing, affecting the leakage prevention and n-well shrinkage.

Innovation Solution

The implementation of a high-k dielectric layer formed using atomic layer deposition (ALD) or selective area chemical vapor deposition (SACVD) with a k-value greater than 8.0, which is annealed to improve thermal stability and eliminate the need for p-type impurity implantation by trapping negative charges and creating a P+ layer at the interface, thereby reducing leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If HARP is used for gap filling instead of HDP, then the gap filling process can be simplified, but the STI regions become less dense and more prone to excessive etching and leakage

Engineering Contradiction:

Improvegap filling processVSAvoidSTI region density and leakage prevention

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material parameter by introducing a high-k dielectric material with k-value greater than 8.0 into the STI structure. This material substitution fundamentally alters the electrical and physical properties of the STI region, providing both density and leakage prevention without requiring the complex HDP process

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite structure by combining the high-k dielectric material with the silicon substrate and existing STI components. This composite approach leverages the unique properties of high-k materials to simultaneously achieve process simplicity and reliable leakage prevention

Inventive Principle:

Principle #40Composite materials

2Strength

If high-temperature annealing is performed to condense HARP-formed STI regions, then etching resistance is improved, but p-type impurity diffuses away and n-wells shrink

Engineering Contradiction:

Improveetching resistance of STI regionsVSAvoidn-well dimensions and impurity distribution

Core Design Contradiction:

StrengthVSManufacturing precision

Solution Approach 1:

The patent eliminates the need for high-temperature annealing by using a high-k dielectric material that provides inherent etching resistance. The material itself serves as a permanent protective layer, making the temporary high-temperature annealing step obsolete

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The high-k dielectric material acts as an intermediary layer between the silicon substrate and the etching environment. This intermediate layer provides the necessary etching resistance without requiring thermal processing that would affect adjacent structures

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If p-type impurity implantation is performed to reduce leakage in STI openings, then leakage prevention is improved, but subsequent annealing causes impurity diffusion and P+ region degradation

Engineering Contradiction:

Improveleakage prevention in image sensorsVSAvoidP+ region integrity

Core Design Contradiction:

ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent extracts the leakage prevention function from the p-type impurity implantation process and transfers it to the high-k dielectric material. The high-k material inherently provides the leakage blocking function without requiring impurity implantation

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/chemical process of impurity implantation with a material property-based solution. The high-k dielectric material's intrinsic electrical properties provide leakage prevention, substituting the need for ion implantation and subsequent thermal processing

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in denser STI regions with improved thermal stability and reduced leakage, eliminating the need for p-type impurity implantation and preventing n-well shrinkage, enhancing the performance of CMOS image sensor chips.

Implementation Method 1

trapping negative charges and creating a P+ layer at the interface

Methodology Applied

Scientific EffectElectrostatic attraction: Electrostatics

Implementation Method 2

formed using atomic layer deposition (ALD)

Methodology Applied

Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Implementation Method 3

formed using atomic layer deposition (ALD) or selective area chemical vapor deposition (SACVD)

Methodology Applied

Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 4

annealed to improve thermal stability

Methodology Applied

Scientific EffectAnnealing: Annealing

Data Source

PatentUS10510790B2High-k dielectric liners in shallow trench isolations

Publication Date: 2019.12.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A circuit structure includes a semiconductor substrate having a top surface. A dielectric material extends from the top surface into the semiconductor substrate. A high-k dielectric layer is formed of a high-k dielectric material, wherein the high-k dielectric layer comprises a first portion on a sidewall of the dielectric material, and a second portion underlying the dielectric material.