High-K Gate Dielectric Doping for Thin-Stack Threshold Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in scaling down semiconductor devices to achieve lower threshold voltages while maintaining manufacturing complexity and cost-effectiveness, particularly in forming FETs with nanostructured channel regions and low threshold voltages without increasing the thickness of work function metal layers.
Innovation Solution
The use of high-K gate dielectric layers doped with varying concentrations of rare-earth metal (REM)-based dopants to generate dipole layers, which adjust the effective work function values of FET gate structures, allowing for the formation of NFETs and PFETs with different and low threshold voltages on the same substrate without increasing the thickness of work function metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the thickness of work function metal layers is increased to achieve lower threshold voltages, then the threshold voltage control is improved, but the manufacturing complexity and device dimensions increase
Solution Approach 1:
The patent changes the material composition parameter of the gate dielectric layer by doping it with rare-earth metal oxides (such as lanthanum oxide, cerium oxide, or gadolinium oxide) at specific concentrations (e.g., 1-20 atomic percent). This compositional change modifies the dielectric properties and creates dipole layers that adjust the effective work function, enabling threshold voltage control without increasing the physical thickness of the gate stack.
Solution Approach 2:
The patent creates a composite gate dielectric structure by combining conventional dielectric materials (such as silicon oxide, silicon nitride, or high-k materials like hafnium oxide) with rare-earth metal oxides. This composite structure generates dipole layers at the interfaces that provide additional work function tuning capability, allowing precise threshold voltage control while maintaining thin gate stack dimensions.
2Ease of manufacture
If the gate stack is scaled down to maintain manufacturing complexity, then the manufacturing cost is reduced, but the ability to achieve low threshold voltages is compromised
Solution Approach 1:
The patent modifies the chemical composition of the gate dielectric layer by incorporating rare-earth metal oxides, which change the electrical properties of the material. This compositional parameter change enables effective work function adjustment and low threshold voltage achievement in thin gate stacks, maintaining manufacturing simplicity while improving electrical performance.
Solution Approach 2:
The patent introduces rare-earth metal doping specifically in the gate dielectric layer adjacent to the channel region, creating a localized dipole layer that provides work function tuning exactly where needed. This localized modification allows threshold voltage control without requiring changes to the entire gate stack structure, maintaining simplicity in other regions.
3Manufacturing precision
If varying concentrations of REM dopants are used to adjust effective work function values, then the threshold voltage precision is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent utilizes variations in rare-earth metal oxide concentration (from 1 to 20 atomic percent or broader ranges) to precisely tune the effective work function values. By controlling this single compositional parameter during the deposition process, the patent achieves precise threshold voltage control for different device types (NFETs and PFETs) without requiring multiple distinct processing steps.
Solution Approach 2:
The patent employs a universal doping approach where the same rare-earth metal oxide dopant can be used across different device regions with varying concentrations to achieve different threshold voltages. This multi-functional dopant system allows a single manufacturing process to produce both NFETs and PFETs with precisely controlled threshold voltages, reducing the need for separate processing lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the manufacture of FETs with different threshold voltages while maintaining thinner gate stacks, reducing manufacturing complexity and costs, and allowing for selective formation of NFETs and PFETs with improved electrical isolation and performance.
Implementation Method 1
high-K gate dielectric layers doped with varying concentrations of rare-earth metal (REM)-based dopants to generate dipole layers, which adjust the effective work function values of FET gate structures
Data Source
AI summary
A semiconductor device with different gate structure configurations and a method of fabricating the semiconductor device are disclosed. The method includes depositing a high-K dielectric layer surrounding nanostructured channel regions, performing a first doping with a rare-earth metal (REM)-based dopant on first and second portions of the high-K dielectric layer, and performing a second doping with the REM-based dopants on the first portions of the high-K dielectric layer and third portions of the high-K dielectric layer. The first doping dopes the first and second portions of the high-K dielectric layer with a first REM-based dopant concentration. The second doping dopes the first and third portions of the high-K dielectric layer with a second REM-based dopant concentration different from the first REM-based dopant concentration. The method further includes depositing a work function metal layer on the high-K dielectric layer and depositing a metal fill layer on the work function metal layer.