High Level Synthesis Apparatus for Circuit Structure Optimization
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Solution Overview
Problem
Existing high-level synthesis techniques optimize individual clusters but fail to consider architecture between clusters, limiting the ability to meet non-functional requirements such as latency, area, and throughput.
Innovation Solution
A high-level synthesis apparatus that includes a structure determination unit to identify candidate circuit structures for multiple execution units, a decision unit to calculate circuit characteristics, and a high-level synthesis unit to perform synthesis based on determined structures, enabling architecture design that meets non-functional requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If individual clusters are optimized using conventional high-level synthesis techniques, then the optimization speed and individual cluster performance are improved, but the architecture between clusters cannot be considered and overall circuit characteristics cannot be optimized
Solution Approach 1:
The patent segments the circuit into multiple clusters (first cluster, second cluster, etc.) and processes each cluster individually to determine optimal structures. This segmentation enables parallel processing of different clusters while maintaining the ability to consider inter-cluster architecture relationships, thus resolving the contradiction between optimization speed and architecture design capability.
Solution Approach 2:
The patent merges the individual cluster optimization results with inter-cluster architecture considerations. By combining the structure determination for each cluster with the analysis of relationships between clusters, the system achieves both fast individual optimization and comprehensive architecture design, resolving the technical contradiction.
2Loss of time
If the design space is defined to enhance search speed, then the search efficiency is improved, but the ability to explore architecture between clusters is limited
Solution Approach 1:
The design space is segmented into cluster-level parameters and architecture-level parameters. This segmentation allows the search process to efficiently explore cluster optimizations independently while separately considering architecture relationships, reducing overall search time without limiting architectural exploration.
Solution Approach 2:
The patent introduces a new dimension in the search space by adding inter-cluster architecture parameters to the traditional intra-cluster parameters. This dimensional expansion enables simultaneous optimization of both individual clusters and their relationships, achieving comprehensive optimization without excessive search time.
3Reliability
If multiple high-level synthesis options are tried to meet non-functional requirements, then the ability to meet requirements is improved, but the search complexity increases enormously
Solution Approach 1:
The synthesis options are segmented into those affecting individual clusters and those affecting inter-cluster architecture. This segmentation allows the system to systematically evaluate options in organized groups, reducing search complexity while maintaining the ability to meet all non-functional requirements through structured exploration.
Solution Approach 2:
The patent systematically changes parameters at two levels: cluster-level parameters (affecting individual execution units) and architecture-level parameters (affecting inter-cluster relationships). This structured parameter exploration enables comprehensive requirement satisfaction while managing search complexity through organized parameter spaces.
Data Source
AI summary
A structure determination unit (112) obtains an operational description (511) and determines a candidate of a circuit structure applicable to a plurality of execution units as a structure candidate, the operational description (511) describing an operation of a circuit and including the plurality of execution units. A decision unit (113) calculates, as a circuit characteristic (522), a characteristic of the circuit when the circuit structure of the plurality of execution units is the structure candidate and outputs the structure candidate as a determined circuit structure (310) when the circuit characteristic (522) meets a threshold (521). A high level synthesis unit (140) performs high level synthesis on the operational description (511) so that the circuit structure of the plurality of execution units becomes the determined circuit structure (310).