High Level Synthesis Loop Optimization for Compile-Time Constants
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Solution Overview
Problem
High-level synthesis in computer-aided design of integrated circuits often results in inefficiencies due to operations that require significant resources, latency, and area when implemented as circuitry, particularly in loop constructs with enumerated operations like modulo and division.
Innovation Solution
Detecting enumerated operations within loop constructs and modifying them to calculate as compile-time constants, reducing resource utilization and latency by transforming the operations outside the loop body.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If enumerated operations (modulo, division) are implemented as circuitry in loop constructs, then the desired computational functionality is achieved, but significant resources, latency, and area are required
Solution Approach 1:
The patent applies preliminary action by evaluating loop boundary conditions and enumerated operations at compile-time rather than runtime. The synthesis tool detects enumerated operations in loop constructs and performs the modulo/division calculations during compilation, transforming them into compile-time constants that eliminate the need for complex circuitry during actual circuit operation.
Solution Approach 2:
The patent extracts the enumerated operations from the loop body and evaluates them separately during the compilation process. By taking out these operations from the runtime execution path and handling them during compilation, the patent eliminates the need for resource-intensive circuit implementations while preserving the desired computational functionality.
2Adaptability or versatility
If enumerated operations are performed at runtime in loop constructs, then operational flexibility is maintained, but latency increases
Solution Approach 1:
The patent performs the enumerated operations preliminarily during compilation rather than at runtime. The synthesis tool evaluates loop boundaries and enumerated operations during the compilation phase, transforming them into compile-time constants. This preliminary evaluation eliminates runtime latency while preserving operational flexibility through the compilation process.
3Productivity
If enumerated operations are implemented as circuitry, then the operations can be performed, but significant area is consumed
Solution Approach 1:
The patent extracts enumerated operations from the circuit implementation and handles them during compilation. By removing these operations from the runtime circuit execution path and evaluating them during compilation, the patent eliminates the need for large area circuit implementations while maintaining operation execution capability.
Solution Approach 2:
The patent replaces the mechanical circuit implementation of enumerated operations with a compilation-time computational approach. Instead of implementing modulo and division operations as physical circuitry that consumes area, the system uses compilation-time calculations to evaluate these operations and generate optimized circuit code, substituting the mechanical implementation with a computational preprocessing step.
Data Source
AI summary
High level synthesis can include detecting, using a processor, an enumerated operation within an instruction of a loop construct of an application, determining, using the processor, whether the loop construct meets a modification condition, and responsive to determining that the loop construct meets the modification condition, modifying, using the processor, the loop construct to calculate the enumerated operation as a compile time constant, wherein the modified loop construct is functionally equivalent to the loop construct.