High Linear Fast Peak Detector with Adaptive Biasing
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Solution Overview
Problem
Existing peak detectors in wireless communication devices face challenges in accurately detecting high peak voltages due to their low speed, poor accuracy, and poor linearity, especially when dealing with large fast rising and falling signals, which can lead to damage to power amplifiers.
Innovation Solution
The implementation of a high linear fast peak detector with variable bias current and variable bias voltage, utilizing NMOS transistors and feedback circuits to adaptively adjust the bias current and voltage based on the input signal, enabling improved detection performance by increasing charging speed for rising signals and discharging speed for falling signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional peak detector is used, then the device structure is simple, but the detection speed is slow and accuracy is poor
Solution Approach 1:
The patent implements dynamic biasing where the bias current and voltage are not fixed but vary according to the input signal characteristics. The bias circuit dynamically adjusts operating points based on signal amplitude and rate of change, enabling the detector to adapt its speed and sensitivity to match the instantaneous signal conditions, thereby achieving fast detection without excessive structural complexity.
Solution Approach 2:
The patent changes key operating parameters (bias current, bias voltage, transistor operating region) dynamically rather than maintaining fixed values. By modulating these parameters in response to input signal characteristics, the detector achieves variable response characteristics that optimize both speed and accuracy across different signal conditions without requiring multiple dedicated circuits.
2Measurement precision
If a conventional peak detector is used, then the device complexity is low, but the linearity is poor and accuracy is insufficient
Solution Approach 1:
The patent incorporates feedback mechanisms where the output signal or intermediate node voltages are fed back to control the biasing of transistors. This feedback enables automatic correction of nonlinearities and maintains the detector operating point within the optimal linear region, significantly improving measurement precision and accuracy while adding only moderate structural complexity through feedback paths.
Solution Approach 2:
The patent employs dynamic operating point adjustment where transistor bias conditions are continuously adapted based on signal characteristics. This dynamic operation allows the detector to maintain high linearity and accuracy across varying signal amplitudes and frequencies, effectively resolving the trade-off between precision and complexity through adaptive rather than static design.
3Speed
If fixed bias current is used, then the circuit is simple, but the detector cannot respond quickly to large fast rising and falling signals
Solution Approach 1:
The patent replaces fixed bias current with a dynamic bias current that varies with signal amplitude and rate of change. The bias circuit monitors signal characteristics and adjusts current levels in real-time, providing higher current during fast transitions to accelerate response while maintaining lower current during steady states, thereby achieving high-speed response without proportionally increasing overall circuit complexity.
Solution Approach 2:
The patent implements variable bias current and voltage parameters that are modulated according to input signal conditions. By changing these parameters dynamically rather than maintaining constant values, the detector achieves accelerated response to fast-rising and fast-falling edges while the bias circuit complexity remains manageable through efficient parameter control mechanisms.
4Speed
If the bias current is increased to improve detection speed, then the charging speed increases, but the power consumption increases
Solution Approach 1:
The patent implements dynamic bias current control where the current level is adjusted in real-time based on signal characteristics rather than maintaining a constantly high current. During fast signal transitions, higher current is supplied to accelerate capacitor charging. During steady-state or slow variations, the current is reduced to minimize power consumption, thereby achieving fast charging speed when needed without sustained high power consumption.
Solution Approach 2:
The patent varies the bias current parameter dynamically according to operational requirements. By modulating this parameter rather than fixing it at a high value, the system achieves fast charging capability during critical transitions while reducing power consumption during normal operation, effectively resolving the trade-off between speed and energy usage through adaptive parameter control.
Data Source
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AI summary
A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.