High-Melting-Point Interconnects for Semiconductor Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Miniaturization of interconnects in semiconductor devices leads to increased resistivity due to interfacial inelastic scattering of electrons and deteriorated reliability from stress migration or electromigration, along with size-dependent electrical resistance issues in low-resistance materials like copper, which also results in a decrease in effective sectional dimensions due to the use of barrier metal films.
Innovation Solution
The use of a high-melting-point conductive layer with a melting temperature of 1000°C or more, such as molybdenum (Mo), tungsten (W), or their silicides, in conjunction with a barrier film to reduce resistivity by increasing crystal grain size and preventing oxidation or nitridation, thereby maintaining interconnect dimensions and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper is used as interconnect material for low resistance, then electrical resistance is reduced, but size-dependent resistance increases and reliability deteriorates due to stress migration and electromigration
Solution Approach 1:
The patent changes the material parameter from copper to high-melting-point materials (tungsten, molybdenum, tantalum) with melting temperatures of 1000°C or more. This parameter change fundamentally alters the interconnect's resistance to stress migration and electromigration, maintaining reliability in miniaturized structures where copper fails.
Solution Approach 2:
The patent employs composite structures combining high-melting-point conductive materials with barrier metal films. The barrier films (such as titanium nitride, tantalum nitride) are integrated with the conductive layer to prevent diffusion and maintain structural integrity, creating a composite interconnect system that overcomes the limitations of pure copper.
2Area of moving object
If interconnect size is miniaturized, then integration density increases, but resistivity increases due to interfacial inelastic scattering of electrons
Solution Approach 1:
The patent changes the material parameter from copper to high-melting-point materials with different electron scattering characteristics. These materials exhibit reduced interfacial inelastic scattering effects, allowing miniaturized interconnects to maintain lower resistivity and better electrical conduction despite reduced cross-sectional area.
3Reliability
If barrier metal film is added to prevent diffusion, then interconnect integrity is improved, but effective sectional dimension decreases
Solution Approach 1:
The patent integrates barrier metal films as thin layers within the interconnect structure. The barrier films are designed with optimized thickness to provide sufficient diffusion prevention while minimizing their impact on the effective conductive cross-section. The composite structure of conductive material plus thin barrier layers achieves both integrity and conductivity.
4Reliability
If high-melting-point material is used, then resistance to stress migration and electromigration is improved, but manufacturing complexity increases
Solution Approach 1:
The patent changes the material selection parameter to high-melting-point materials that can be deposited using standard semiconductor manufacturing techniques such as sputtering and chemical vapor deposition. The manufacturing complexity is managed by utilizing established process technologies rather than introducing entirely new fabrication methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The high-melting-point conductive layers reduce the resistance of interconnects by increasing crystal grain size and preventing dimensional reduction, while the barrier films inhibit impurity diffusion, maintaining the integrity and performance of miniaturized interconnects.
Implementation Method 1
increasing crystal grain size
Implementation Method 2
barrier film to reduce resistivity by increasing crystal grain size and preventing oxidation or nitridation
Data Source
AI summary
According to one embodiment, a semiconductor device includes an interconnect provided on a first interlayer insulating film covering a semiconductor substrate in which an element is formed, a cap layer provided on the upper surface of the interconnect, and a barrier film provided between the interconnect and a second interlayer insulating film covering the interconnect. The interconnect includes a high-melting-point conductive layer, and the width of the interconnect is smaller than the width of the cap layer. The barrier film includes a compound of a contained element in the high-melting-point conductive layer.