Selective High-Permittivity Dielectric Deposition for Metal-Oxide-Metal Capacitors

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Solution Overview

Problem

Increasing memory capacity in semiconductor devices without increasing chip size is challenging, as miniaturizing static random access memory (SRAM) devices reduces cell size, and dynamic random access memory (DRAM) capacitors' size decreases retention time, leading to higher power consumption and heat output.

Innovation Solution

The method involves removing a section of low permittivity insulating material between metal contact elements and depositing a higher permittivity material and a metal plate within the insulating material to form capacitors with higher capacitance, allowing for increased density without additional space or multiple masks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory device density is increased by miniaturizing SRAM devices, then memory capacity increases, but manufacturing complexity and cost increase significantly

Engineering Contradiction:
Improvememory capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent changes the dielectric constant parameter of the insulating material between capacitor plates from low permittivity to high permittivity material, enabling higher capacitance values without reducing capacitor physical dimensions. This allows memory density improvement through material parameter optimization rather than geometric miniaturization.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If capacitor size is decreased to increase memory density, then memory cell density increases, but retention time decreases

Engineering Contradiction:
Improvememory densityVSAvoidretention time
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

The patent utilizes the relationship between dielectric constant and capacitance (C = κϵ0A/d) to increase capacitance by selecting high permittivity dielectric materials. This enables smaller capacitors to achieve the same or higher capacitance values, improving memory density while maintaining retention time characteristics.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If capacitor size is decreased to increase memory density, then memory cell density increases, but power consumption and heat output increase due to more frequent refreshing

Engineering Contradiction:
Improvememory densityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

By changing the dielectric material parameter to high permittivity material, the patent achieves higher capacitance in reduced capacitor sizes. Larger capacitance values extend retention time, reducing the refresh frequency requirement and thereby lowering dynamic power consumption associated with frequent memory cell refreshing.

Inventive Principle:
Principle #35Parameter changes

4Quantity of substance

If additional layers and photolithographic steps are added to realign capacitors for higher capacitance, then capacitance increases, but manufacturing cost increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidmanufacturing cost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent applies local quality by selectively depositing high permittivity dielectric material in specific regions between capacitor plates, rather than uniformly across the entire chip. This localized material modification achieves the desired capacitance enhancement without requiring additional global processing layers or complex photolithographic alignment steps.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of higher capacitance capacitors in a smaller space using a single mask, enhancing memory density and retention time while reducing manufacturing costs and power consumption.

Implementation Method 1

removing a section of a first insulating material that has a relatively lower permittivity between a first metal contact element and a second metal contact element, and replacing the section with a second insulating material having a higher permittivity, results in a capacitor having a higher capacitance

Methodology Applied
Scientific EffectPermittivity: Dielectric Permittivity

Data Source

PatentUS9245881B2Selective fabrication of high-capacitance insulator for a metal-oxide-metal capacitor
Publication Date: 2016.01.26 QUALCOMM INC
  • US9245881B2 patent drawing
  • US9245881B2 patent drawing
  • US9245881B2 patent drawing

AI summary

Methods and devices of a capacitor in a semiconductor device having an increased capacitance are disclosed. In a particular embodiment, a method of forming a capacitor is disclosed. A section of a first insulating material between a first metal contact element and a second metal contact element is removed to form a channel. A second insulating material is deposited in the channel between the first metal contact element and the second metal contact element.