High-Side Driver Gate-Stress Testing Without a Dedicated Test Pad
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Solution Overview
Problem
Existing high side driver circuits for buck regulators in automotive applications require a dedicated test pad for gate stress testing, which consumes die area and complicates the design, especially in split power MOS applications.
Innovation Solution
A high side driver circuit design that eliminates the need for a test pad by using a switch between the SBUCK and PHASE nodes, allowing for a gate-stress test mode without a dedicated test pad, enabling leakage current measurements and transistor stress testing while consuming less die area and simplifying the driver stage design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated test pad is used for gate stress testing, then gate stress testing can be performed, but die area is consumed and design is complicated
Solution Approach 1:
The patent merges the gate stress test function with the existing driver stage output. The driver stage output is coupled to both the gate of the high side power MOS transistor and the gate stress test circuit, eliminating the need for a separate test pad. This integration allows gate stress testing to be performed using the same output node that drives the transistor during normal operation.
Solution Approach 2:
The driver stage output is designed to serve multiple functions: it drives the gate of the high side power MOS transistor during normal operation and simultaneously serves as the test input for gate stress testing. The gate stress test circuit can be activated by setting the gate stress test signal to a specific logic level, enabling the same node to perform both driving and testing functions.
2Reliability
If a dedicated test pad is used for gate stress testing, then gate stress testing can be performed, but device complexity increases
Solution Approach 1:
The patent combines the gate stress test circuit with the existing driver stage, sharing common components such as the output node and control logic. The gate stress test circuit includes transistors and logic gates that are integrated into the driver stage architecture, allowing testing functionality to be added without requiring a completely separate test circuit.
Solution Approach 2:
The driver stage is designed with multi-functionality, where the same output node and control signals serve both normal operation and gate stress testing. The gate stress test mode is activated by setting the gate stress test signal to a specific logic level, which reconfigures the circuit to perform testing instead of normal driving, eliminating the need for separate test circuitry.
Data Source
AI summary
A high side driver circuit includes a driver stage having an input, an output, a first power terminal and a second power terminal, a transistor having a first power terminal, a second power terminal, and a control terminal coupled to the output of the driver stage, and a switch coupled between the second power terminal of the driver stage and the second power terminal of the transistor.