High Side Control Switching Converter Latch Intermediate Ground
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Solution Overview
Problem
High side control in switching power converters, particularly in high voltage applications, is hindered by negative voltage at the switching node due to parasitic inductance and capacitance, leading to failure in triggering high side control and undesired state information flips in latches.
Innovation Solution
The implementation of a moving level shifting ground that tracks the voltage at the switching node, coupled with hysteresis paths and shielding to reduce parasitic capacitance, ensures the latch can be triggered even when the switching node is negative, and prevents undesired state information flips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional latch control circuit is used in high voltage power converters, then the circuit structure is simple, but the latch cannot be reliably triggered when the switching node voltage is negative due to parasitic inductance and capacitance
Solution Approach 1:
The patent introduces an intermediate ground node that acts as a mediator between the switching node and the latch control circuit. This intermediate ground tracks the switching node voltage through diode connections, providing a stable reference voltage to the latch that remains valid even when the switching node goes negative. The intermediary ground node isolates the latch from direct exposure to negative voltage swings, enabling reliable triggering without requiring complex protection circuitry.
Solution Approach 2:
The patent changes the reference voltage parameter for the latch by introducing a movable ground reference that dynamically adjusts its potential. Instead of using a fixed ground reference that becomes invalid when the switching node goes negative, the intermediate ground node shifts its voltage level to track the switching node, maintaining a valid voltage differential across the latch throughout the entire switching cycle.
2Reliability
If parasitic capacitance is present in the control circuit, then the circuit is easier to manufacture, but undesired state information flips occur in the latch during switching transitions
Solution Approach 1:
The intermediate ground node serves as a shielding intermediary that isolates the latch control circuit from parasitic capacitance effects. By providing a stable, tracked reference voltage, it prevents parasitic coupling during switching transitions from causing unwanted voltage fluctuations that would trigger false state changes in the latch.
Solution Approach 2:
The patent implements beforehand cushioning by pre-establishing the intermediate ground reference before switching transitions occur. This tracked ground potential acts as a cushion against voltage spikes and parasitic effects, absorbing their impact before they can cause harmful state flips in the latch during the critical switching moment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable high side control by maintaining a low enough voltage for latch triggering and reducing the impact of parasitic capacitance, ensuring accurate state information handling during transitions.
Implementation Method 1
a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground
Implementation Method 2
coupled with hysteresis paths and shielding to reduce parasitic capacitance, ensures the latch can be triggered even when the switching node is negative
Implementation Method 3
hysteresis paths and shielding to reduce parasitic capacitance
Data Source
AI summary
Methods, systems, and apparatus to facilitate high side control of a switching power converter are disclosed. An example apparatus includes a latch including a first node coupled to a first source of a first switch and an output coupled to a first gate of the first switch; a first diode coupled to the first node and a second node; a second diode coupled to the second node and ground; a second switch coupled to a voltage source and the second node; and a third switch including a third gate coupled to the second switch, a third source coupled to the second node, and a third drain coupled to the latch.