High-Side Transistor Drive Circuit With Pulse Level Shifting

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Solution Overview

Problem

High-side transistor drive circuits in applications like DC/DC converters and motor drive circuits face high power consumption due to significant stable-state current, even at high voltage levels, necessitating a reduction in power consumption.

Innovation Solution

A high-side transistor drive circuit design incorporating a level shift circuit and a buffer, featuring a pulse generator, open drain circuit, current mirror circuits, and latch circuits to generate pulses based on input signal edges, reducing stable-state current and power consumption by minimizing current flow through high breakdown voltage elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a conventional high-side transistor drive circuit is used, then the transistor can be driven properly, but power consumption is high due to significant stable-state current

Engineering Contradiction:
Improvepower consumptionVSAvoidtransistor drive reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies periodic action by using pulse signals to drive the high-side transistor instead of continuous voltage application. The level shift circuit generates pulses only during switching transitions (rising and falling edges), keeping the transistor in a stable state for extended periods without continuous current flow, thereby reducing power consumption while maintaining reliable transistor operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent extracts the continuous current path by introducing high-impedance states in the level shift circuit. The circuit is designed to remove the connection between the bootstrap capacitor and the gate during stable periods, eliminating the stable-state current that causes high power consumption, while still allowing proper transistor driving during switching transitions.

Inventive Principle:
Principle #2Taking out (Extraction)

2Strength

If high breakdown voltage elements are used in the drive circuit, then high voltage operation is enabled, but chip area increases

Engineering Contradiction:
Improvebreakdown voltage capabilityVSAvoidchip area
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

The patent segments the circuit into different voltage domains: the bootstrap capacitor and level shift circuit operate at high voltage to drive the high-side transistor, while the pulse generator and logic circuits operate at lower voltages. This segmentation allows using high breakdown voltage elements only where necessary (in the high-voltage path), reducing the overall chip area compared to designing the entire circuit for high voltage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary level shift circuit that translates low-voltage pulse signals into high-voltage gate drive signals. This intermediary stage allows the use of smaller, lower-voltage elements for signal generation and control, while only the essential high-voltage components (bootstrap capacitor, level shift transistors) need to handle high breakdown voltages, optimizing chip area.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11936298B2Drive circuit of high-side transistor, switching circuit, and controller of DC/DC converter
Publication Date: 2024.03.19 ROHM CO LTD
  • US11936298B2 patent drawing
  • US11936298B2 patent drawing
  • US11936298B2 patent drawing

AI summary

The present disclosure relates to a high-side transistor drive circuit, a switching circuit and a controller of a DC/DC converter. A pulse generator generates a first pulse that becomes high level for a certain period of time in response to a first edge of an input signal and a second pulse that becomes high level for a certain period of time in response to a second edge of the input signal. An open drain circuit has a first output node that becomes low level in response to the first pulse and a second output node that becomes low level in response to the second pulse. A first current mirror circuit folds back a first current flowing through the first output node of the open drain circuit. A second current mirror circuit folds back a second current flowing through the second output node of the open drain circuit.