High-Side Switch Zero-Crossing Detection Without Level Shifters
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Solution Overview
Problem
High-side semiconductor switches face challenges in detecting zero-crossings efficiently due to the need for high-voltage comparators and additional level shifters, which introduce delays in processing signals, affecting electromagnetic compatibility and switching speed.
Innovation Solution
Integrating zero-crossing detection into the floating control logic of the high-side semiconductor switch, eliminating the need for high-voltage comparators and level shifters by using a series circuit of a capacitor and resistor with a comparator, and leveraging the drain-gate or gate-source capacitance of a MOS transistor for edge detection, allowing for faster detection and reduced delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a ground-related supply voltage is used for the zero-crossing detector, then the detector can be supplied by a simple supply, but the output signal must be level shifted by an extra level shifter which introduces delay
Solution Approach 1:
The patent merges the zero-crossing detector with the floating control logic by providing the detector with a floating supply voltage that matches the control logic's supply voltage. This integration eliminates the need for a separate level shifter stage, thereby reducing signal processing delay while maintaining ease of manufacture through unified power supply design.
2Reliability
If high-voltage comparators are used in the zero-crossing detector, then the detector can handle high switching voltages, but the device complexity and processing delay increase
Solution Approach 1:
The patent introduces a voltage divider circuit as an intermediary between the high-voltage switching node and the comparator inputs. This voltage divider steps down the high voltage to a level suitable for standard low-voltage comparators, thereby maintaining high-voltage handling capability while reducing device complexity and avoiding the need for specialized high-voltage comparator designs.
3Ease of operation
If additional level shifters are added to the circuit, then the signal levels can be properly matched, but the processing speed of the output signal is reduced
Solution Approach 1:
The patent combines the zero-crossing detection function directly within the floating control logic block, eliminating the need for external level shifter circuits. The detector and control logic share the same floating supply voltage, allowing direct signal interfacing without level conversion stages, thus maintaining proper signal level matching while maximizing processing speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster detection of zero-crossings, reduces processing delays, and improves electromagnetic compatibility by eliminating the need for high-voltage comparators and level shifters, enhancing the overall switching operation of high-side semiconductor switches.
Implementation Method 1
The means for detecting an edge in the output signal comprises a series circuit of a capacitor and a resistor connected between the first supply terminal and the output terminal
Implementation Method 2
a comparator whose first input terminal is connected with the common node of the capacitor and the resistor, and a reference voltage source connected between a second input terminal of the comparator and the output terminal
Data Source
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AI summary
A Circuit arrangement comprising a high-side semiconductor switch (Mhs) with a first load terminal (D) connected to a first supply terminal receiving an input voltage (Vin), a second load terminal (S) connected to an output terminal providing an output signal (Vo), and a control terminal (G), a floating driver circuit (22) connected to said control terminal (G) for driving said semiconductor switch (Mhs), a level shifter (10) receiving an input signal (PWM) and providing a floating input signal (PWMh) dependent on said input signal (PWM), a floating control logic (2) receiving said output signal (Vo) and said floating input signal (PWMh) and providing at least one control signal (CTRL) to said floating driver circuit (22), wherein said floating control logic (2) comprises means (25',V1,C1,R1) for detecting an edge in said output signal (Vo) and means (21) for generating said control signal (CTRL) dependent on the result of the edge detection.