High-Speed Driver Mux-Then-Driver Topology for Timing Relaxation
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Solution Overview
Problem
High-speed serializer/deserializer (SerDes) systems face challenges in handling high bit rates due to timing constraints and output resistance issues caused by explicit T-gate multiplexers, leading to increased parasitic capacitance and imbalanced rise/fall times.
Innovation Solution
Implementing a mux-then-driver topology that moves multiplexing to the predriver circuit, eliminating the multiplexer from the full rate output path and using differential series source transistor (SST) drivers with parallel attenuator slices for amplitude control and impedance compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an explicit T-gate multiplexer is used in the output path, then data streams can be multiplexed, but timing constraints become tighter and parasitic capacitance increases
Solution Approach 1:
The patent extracts the multiplexer from the full-rate output path and relocates it to the predriver circuit operating at half-rate. This removes the timing-critical multiplexing operation from the high-speed path, thereby relaxing timing constraints while preserving multiplexing functionality.
Solution Approach 2:
The multiplexing operation is performed in advance at a lower data rate in the predriver circuit, before the signal reaches the full-rate output path. This preliminary multiplexing action allows the high-speed path to operate without the timing burden of real-time multiplexing.
2Adaptability or versatility
If an explicit T-gate multiplexer is used in the output path, then data streams can be multiplexed, but parasitic capacitance increases
Solution Approach 1:
The patent extracts the multiplexer from the full-rate output path and relocates it to the predriver circuit. This removal eliminates the parasitic capacitance contribution of the T-gate multiplexer from the critical output path, reducing overall parasitic effects.
Solution Approach 2:
The patent changes the operational dimension of the multiplexer from full-rate to half-rate operation. By operating the multiplexer at a lower frequency in the predriver, the dynamic charging and discharging of parasitic capacitances occurs less frequently, reducing their harmful effects.
3Object-affected harmful factors
If driver transistor size is increased to reduce output resistance, then output resistance decreases, but rise and fall times become imbalanced
Solution Approach 1:
The patent employs asymmetric predriver configurations where the pull-up and pull-down networks are differently sized and structured. This asymmetry allows independent optimization of rise and fall times, enabling balanced edge transitions even with varying driver transistor sizes for output resistance control.
Solution Approach 2:
The patent applies different design characteristics to different parts of the driver circuit. The predriver circuit has optimized transistor sizes and configurations tailored to specific rise or fall time requirements, while the main driver transistors are sized for output resistance. Each section has locally optimized properties rather than uniform design.
Data Source
AI summary
Apparatus and methods for high-speed drivers are provided herein. In certain embodiments, a high-speed driver multiplexes two or more data streams. The high-speed driver is implemented with a mux-then-driver topology that provides multiplexing in a predriver circuit. Thus, the multiplexer is eliminated from the full rate output path to relax timing. Driver amplitude control schemes are also disclosed in which a controllable driver includes a group of differential series source transistor (SST) driver slices that are connected in parallel with one another to drive a pair of output terminals, and a group of attenuator slices that are connected in parallel with one another across the pair of output terminals. Additionally, the controllable driver includes a control circuit that activates an attenuator slice for each SST driver slice that is decommissioned to provide output amplitude control.