High Speed Grounded Communication Jack Impedance Control

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Solution Overview

Problem

Current communication jacks, such as RJ45 jacks, are limited in their ability to maintain consistent signal quality at high frequencies due to inadequate design, leading to signal degradation and interference, which hampers high-speed data transmission.

Innovation Solution

A high-speed communication jack design featuring a flexible printed circuit board with radio frequency tuned circuits and a shielding case, which includes a conductive material like gold or copper, to provide balanced impedance and reduce interference, allowing for efficient transmission of high-speed data signals up to 40 Gbps and beyond.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional RJ45 jack design is used, then device complexity is low and ease of manufacture is high, but signal quality degrades at high frequencies due to inadequate impedance control and shielding

Engineering Contradiction:
Improvesignal qualityVSAvoidjack structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by precisely controlling impedance values (e.g., 50 ohm single-ended, 100 ohm differential) through specific trace geometry, substrate material selection, and via design. The jack structure incorporates controlled impedance transmission lines with calculated trace widths, spacing, and layer configurations to maintain consistent signal quality at high frequencies up to 2.5 GHz and beyond.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses intermediary elements including ground planes between signal layers, shielding structures, and via fences to isolate high-frequency signal paths from other circuit elements. These intermediaries prevent electromagnetic interference and crosstalk, maintaining signal integrity in the multi-gigahertz range.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If traditional RJ45 jack design is used, then manufacturing is simple, but signal interference and loss increase at multi-gigahertz frequencies

Engineering Contradiction:
Improvesignal transmissionVSAvoidjack fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent specifies precise manufacturing parameters including trace widths (e.g., 5-10 mils), spacing (e.g., 3-5 mils), via diameters (e.g., 3-5 mils), and substrate thickness (e.g., 1.6mm) to achieve controlled impedance. These parameters are maintained throughout the jack structure to ensure consistent signal transmission at high frequencies while being compatible with standard PCB manufacturing processes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The jack structure is segmented into distinct functional zones: input connector region, impedance control section with controlled impedance traces, shielding region with ground planes and via fences, and output connection region. This segmentation allows each zone to be optimized for its specific function while maintaining overall manufacturability through modular design.

Inventive Principle:
Principle #1Segmentation

3Productivity

If impedance matching is implemented with multiple shielding layers and traces, then signal quality improves at high speeds, but device complexity increases

Engineering Contradiction:
Improvedata transmission speedVSAvoidcircuit board structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent utilizes multiple PCB layers to implement impedance control and shielding, transitioning from two-dimensional trace routing to three-dimensional layer stacking. Signal traces are routed on specific layers with ground planes on adjacent layers, creating controlled impedance environments. Via connections penetrate through multiple layers to maintain continuity, effectively using the vertical dimension to manage signal integrity at high data rates.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs composite construction combining FR-4 substrate material with copper traces and plating, supplemented by dielectric layers and conductive shielding materials. This composite approach achieves the necessary impedance characteristics and shielding effectiveness for multi-gigabit data transmission while maintaining compatibility with standard manufacturing techniques.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces signal loss and interference, enabling reliable high-speed data transmission by matching impedance and shielding the communication signals, thus exceeding the performance requirements of existing standards like IEEE 40 GBase-T.

Implementation Method 1

a shielding case surrounding the housing

Methodology Applied
Scientific EffectElectrostatic shielding: Faraday Cage

Implementation Method 2

a conductive material like gold or copper, to provide balanced impedance and reduce interference

Methodology Applied
Scientific EffectElectrical conductance: Conduction (electrical)

Data Source

PatentUS9627816B2High speed grounded communication jack
Publication Date: 2017.04.18 SENTINEL CONNECTOR SYST
  • US9627816B2 patent drawing
  • US9627816B2 patent drawing
  • US9627816B2 patent drawing

AI summary

A method of manufacturing a high speed jack, the method including the steps of forming a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug, forming a shielding case surrounding the housing, forming a top layer of a substrate, a first shielding layer on a first side of the top layer in the substrate, a second shielding layer adjacent the first shielding layer in the substrate, and forming a bottom layer adjacent to the second shielding layer, forming a plurality of first vias extending through the substrate with each first via being configured to accommodate a pin on the housing, forming a plurality of second vias extending through the substrate with each second via being configured to accommodate a pin on the housing.