High Speed Latch with Integrated Over Voltage Protection

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Solution Overview

Problem

High-speed communication channels face issues with signal distortions due to frequency-dependent attenuation and noise, which can lead to errors in signal reception, and existing solutions lack effective over-voltage protection for thin oxide devices in high-speed latch circuits.

Innovation Solution

A high-speed latch with an integrated over-voltage protection circuit that limits output voltage based on a voltage source limit, allowing operation with high power supply voltages and preventing digital output signals from exceeding the voltage source limit, thereby protecting thin oxide devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high power supply voltages are used in high-speed latch circuits, then the speed and drive capability are improved, but thin oxide devices are damaged due to over-voltage

Engineering Contradiction:
Improvelatch operation speedVSAvoiddevice reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

An over-voltage protection circuit is introduced as an intermediary between the high power supply voltage source and the thin oxide devices in the latch circuit. This protection circuit monitors the voltage levels and actively prevents over-voltage conditions from reaching the sensitive thin oxide devices, thereby enabling the use of high power supply voltages for improved speed without compromising device reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The over-voltage protection circuit provides beforehand cushioning by preparing protective mechanisms in advance before over-voltage damage can occur. The circuit is designed to detect and respond to voltage excursions before they can reach harmful levels for the thin oxide devices, cushioning them against potential damage while allowing high voltage operation for performance improvement.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If over-voltage protection circuits are added to high-speed latch, then device reliability is improved, but circuit complexity increases

Engineering Contradiction:
Improvethin oxide device protectionVSAvoidlatch circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The over-voltage protection functionality is merged with the existing latch circuit structure rather than being implemented as a completely separate subsystem. The protection circuit shares common elements such as power supply connections, signal paths, and potentially transistors with the main latch circuit, thereby providing reliable over-voltage protection while minimizing the increase in overall circuit complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9350331B2High speed latch with over voltage protection and integrated summing nodes
Publication Date: 2016.05.24 MARVELL ASIA PTE LTD
  • US9350331B2 patent drawing
  • US9350331B2 patent drawing
  • US9350331B2 patent drawing

AI summary

A latch includes a current source, an input amplifier, and a latch output circuit. The current source is configured to output a current based on a voltage source. The input amplifier is configured to receive a differential analog input signal including a first differential input and a second differential input and selectively provide the current based on the first differential input and the second differential input. A latch output circuit is configured to selectively output a differential digital output signal including a first differential output and a second differential output. The latch output circuit includes an over voltage protection circuit configured to receive the current output from the input amplifier, receive the voltage source limit, and output a modified differential digital output signal based on a comparison between a voltage corresponding to each of the first differential output and the second differential output and the voltage source limit.