High Speed Interface Routing Pattern for Signal Integrity

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Solution Overview

Problem

Current package substrate routing designs are inadequate for handling high-speed signals, leading to signal loss and degradation in integrated circuit applications.

Innovation Solution

A routing pattern for high-speed signals is implemented using trace pairs with similar lengths, arcing corners, and grounded guard traces, with contacts and vias positioned to minimize signal reflections and cross-talk, and redundant power vias are added for improved impedance control and noise isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional package substrate routing designs are used, then manufacturing simplicity is maintained, but signal integrity deteriorates due to reflections and cross-talk at high speeds

Engineering Contradiction:
Improvesignal integrityVSAvoidrouting design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The routing design segments the signal path into controlled sections with specific length relationships. Trace pairs are designed with lengths that are not integer multiples of the minimum time between transitions, creating deliberate segmentation that prevents constructive interference and signal reflections. This segmentation approach maintains signal integrity without requiring complete redesign of the entire routing system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different routing qualities to different signal types. High-speed signals receive specialized treatment with arcing corners, guarded traces, and specific length constraints, while lower-speed signals use conventional routing. This local quality differentiation ensures that only the critical high-speed paths receive the enhanced complexity needed for signal integrity, rather than complicating the entire substrate design.

Inventive Principle:
Principle #3Local quality

2Reliability

If trace lengths are made substantially similar for differential pairs, then signal synchronization is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesignal synchronizationVSAvoidtrace length control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the parameter of trace length to be substantially similar across differential pairs, ensuring that signals arrive at synchronized times. By controlling the length parameter within a specific range and ensuring it is not an integer multiple of the minimum time between transitions, the design achieves signal synchronization while the relaxed constraint (substantially similar rather than exactly equal) maintains manufacturability.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If grounded guard traces are added around signal traces, then signal isolation is improved, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvesignal isolationVSAvoidrouting structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Grounded guard traces act as intermediary elements between adjacent signal traces. These ground traces serve as mediators that absorb and redirect electromagnetic fields, preventing cross-talk between differential pairs. The guard traces are integrated into the existing routing layers without requiring additional manufacturing steps, achieving signal isolation through clever use of existing substrate structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If contacts are positioned exclusively adjacent to substrate edges, then cross-talk reduction is achieved, but routing flexibility decreases

Engineering Contradiction:
Improvecross-talk reductionVSAvoidrouting flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent employs asymmetric contact positioning where differential pair contacts are exclusively disposed adjacent to substrate edges with specific orientation (line through contacts substantially perpendicular to edge). This asymmetric placement creates natural spacing between adjacent differential pairs, reducing cross-talk. The consistent edge-adjacent positioning pattern provides predictable signal isolation while the design accommodates various high-speed signal configurations.

Inventive Principle:
Principle #4Asymmetry

5Reliability

If straight trace portions have lengths not equal to integer multiples of minimum transition time, then signal reflections are reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesignal reflection controlVSAvoidtrace length precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The design preemptively prevents signal reflections by ensuring straight trace portions have lengths that are not integer multiples of the minimum time between transitions. This preliminary anti-action approach avoids the constructive interference that would occur with integer-multiple lengths. The constraint is applied during the design phase rather than requiring post-manufacturing adjustment, and the relaxed precision requirement (not exactly equal but substantially controlled) makes it manufacturable.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS7414322B2High speed interface design
Publication Date: 2008.08.19 ADEIA SEMICON TECH LLC
  • US7414322B2 patent drawing
  • US7414322B2 patent drawing
  • US7414322B2 patent drawing

AI summary

The embodiments of the present invention are directed toward the design of routing patterns, including elements such as contacts, traces, and vias, for high speed differential signal pairs in integrated circuit package substrates.