High Speed Signal Circuit Board Test Section Design

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Solution Overview

Problem

Conventional in-circuit testing methods for high-speed signal transmission on printed circuit boards disrupt the impedance of metal printed wires, leading to inconsistent signal transmission and reduced stability, making it difficult to test these wires during the fabrication process, which is further complicated by the large number of components and varying production times across different lines.

Innovation Solution

The circuit board design includes a substrate with an insulating layer and two metal printed wires, where at least one wire has a test section exposed through a test opening, with specific alignment and line width variations to minimize impedance inconsistency by adjusting the distance and line width ratios between test and non-test sections, thereby reducing mutual capacitance and maintaining high transmission quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a conventional test block is disposed on the metal printed wires for transmitting a high speed signal, then the test block can be contacted by test probes for testing, but the impedance of the metal printed wires becomes inconsistent and the signal transmission quality deteriorates

Engineering Contradiction:
ImprovetestabilityVSAvoidsignal transmission quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The metal printed wire is segmented into a test section and a non-test section. The test section is exposed through the test opening for probe contact, while the non-test section maintains the original impedance characteristics for high-speed signal transmission. This segmentation allows testing without compromising signal quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different sections of the metal printed wire have different properties: the test section has exposed geometry for testing purposes, while the non-test section maintains the original covered geometry for optimal signal transmission. This local differentiation resolves the contradiction between testability and signal quality.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If functional test is performed after the fabrication of the entire system is completed, then all components can be tested together, but the quantity of components to be tested is large and complicated and the production time varies across different lines

Engineering Contradiction:
Improvecompleteness of testVSAvoidproduction efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The test section is prepared and exposed during the fabrication process itself, enabling testing to be performed before the entire system assembly is completed. This preliminary preparation of test access allows for earlier testing intervention, reducing the complexity and time of final system testing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10775427B2Circuit board for transmitting high speed signal and for said signal to be detected
Publication Date: 2020.09.15 WIWYNN CORP
  • US10775427B2 patent drawing
  • US10775427B2 patent drawing
  • US10775427B2 patent drawing

AI summary

A circuit board for transmitting a high speed signal and for the high speed signal to be detected comprises a substrate, an insulating layer and two metal printed wires. The insulating layer is disposed on the substrate, and comprises a first surface, a second surface and a test opening, with the first surface facing away from the substrate, the second surface facing the substrate, and the test opening passing through the first surface and formed above the second surface. Said two metal printed wires are configured to transmit the high speed signal and embedded in the insulating layer between the first surface and the second surface. At least one of the metal printed wires comprises a test section which is aligned to the test opening of the insulating layer and exposed by the test opening.