High Throw-Count RF Switch Using Branch Isolation Switches
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Solution Overview
Problem
Conventional multiple-pole FET-based RF switch architectures are limited to about 8 ports due to parasitic inductances and capacitances, which degrade RF performance and restrict bandwidth, especially at higher frequencies, leading to trade-offs with insertion loss, return loss, and isolation.
Innovation Solution
The introduction of additional common RF path branch isolation switches controlled by state-dependent logic, which are normally OFF and only activated when necessary to couple 'far side' ports to the common path, reducing reactive load and enhancing bandwidth by effectively isolating inactive branches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of ports in a multiple-pole FET-based RF switch is increased beyond 8 ports, then the throw-count and signal path flexibility are improved, but parasitic inductances and capacitances increase, degrading RF performance and bandwidth
Solution Approach 1:
The RF switch is divided into multiple independent pole sections, each with its own set of FETs and switching elements. This segmentation allows each section to be optimized independently, reducing the cumulative parasitic effects while maintaining high throw-count capability across the entire switch architecture.
Solution Approach 2:
Impedance matching networks and transmission lines are introduced as intermediary elements between FETs and signal ports. These intermediaries compensate for parasitic inductances and capacitances by providing opposite reactive effects, thereby maintaining broadband performance and reducing the harmful impact of parasitics on RF signal quality.
2Reliability
If additional impedance elements (inductors and transmission lines) are added to compensate for parasitic effects, then RF performance is improved, but device complexity and the number of components increase
Solution Approach 1:
Impedance matching networks are integrated directly into the switch architecture, combining multiple functions (impedance transformation, parasitic compensation, and signal routing) into unified circuit blocks. This merging reduces the total component count while maintaining RF performance through co-optimized design of FETs and matching networks.
Solution Approach 2:
The impedance elements are designed to serve multiple functions simultaneously: matching impedance for broadband operation, compensating for parasitic reactances, and providing isolation between signal paths. This multi-functionality reduces the need for separate dedicated components for each function.
3Adaptability or versatility
If the throw-count is increased to provide more signal paths, then versatility is improved, but insertion loss and bandwidth are degraded due to accumulated parasitic effects
Solution Approach 1:
Each signal path is equipped with locally optimized impedance matching networks and FET configurations tailored to minimize parasitic effects specific to that path. This local optimization ensures that insertion loss remains low even as the total number of paths increases, as each individual path maintains excellent RF characteristics.
Solution Approach 2:
The FET dimensions, gate lengths, and widths are carefully adjusted to optimize the trade-off between on-resistance and off-capacitance for each switching element. By changing these physical parameters, the parasitic effects are minimized, maintaining low insertion loss across all signal paths while supporting high throw-count operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for high throw-count RF switches with improved RF performance at frequencies exceeding those of conventional switches, maintaining good insertion loss, return loss, and isolation while extending operational bandwidth beyond 6 GHz.
Implementation Method 1
a multiple-pole FET-based RF switch architecture... each port RFn connects to the common path through a series-shunt switching element comprising a FET series switch and a FET shunt switch
Implementation Method 2
an 'OPEN' or 'OFF' (i.e., high impedance or blocking) FET behaves as a capacitor due to parasitic capacitances arising from the proximity of various semiconductor structures
Data Source
AI summary
A high throw-count multiple-pole FET-based RF switch architecture that provides good RF performance in terms of insertion loss, return loss, isolation, linearity, and power handling. A common port RFC is coupled along a common path to multiple ports RFn. Embodiments introduce additional common RF path branch isolation switches which are controlled by state dependent logic. The branch isolation switches help to isolate the unused branch ports RFn and the unused portion of the common path from the active portion of the common path, and thereby reduce the reactive load attributable to such branches that degrades RF performance of the ports RFn “closer” to the common port RFC. The branch isolation switches can also be used to reconfigure the switch architecture for a multiplex function as well as separate switch path banks for re-configurability of purpose, tuning, or varying switch throw counts and packaging options.