High Voltage Device With Laterally Offset Well For Breakdown Voltage
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Solution Overview
Problem
High voltage devices like LDMOS and DDDMOS have limited breakdown voltage and application range due to restricted ion implantation parameters when integrated with low voltage devices, requiring additional manufacturing steps to increase breakdown voltage, which increases costs.
Innovation Solution
A high voltage device design featuring a second conductive type well with a lower surface forming a PN junction with the substrate, allowing for enhanced breakdown voltage without additional manufacturing steps, enabling integration with low voltage devices using common process steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional lithography and ion implantation processes are used to increase breakdown voltage, then breakdown voltage is improved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent applies local quality by creating a specific structural configuration in the drift region where part of the second conductive type well is positioned laterally offset from the first conductive type well. This localized structural differentiation enables enhanced breakdown voltage through optimized electric field distribution in specific regions, without requiring additional manufacturing processes across the entire device.
Solution Approach 2:
The patent utilizes dimensional change by positioning part of the second conductive type well at a different lateral position from the first conductive type well, creating a three-dimensional structural arrangement. This spatial configuration in multiple dimensions allows the drift region to achieve higher breakdown voltage through extended depletion region coverage, while being formed using the same ion implantation process as conventional devices.
2Reliability
If additional lithography and ion implantation processes are used to increase breakdown voltage, then breakdown voltage is improved, but manufacturing cost increases
Solution Approach 1:
The patent achieves universality by designing the high voltage device structure to be compatible with standard CMOS manufacturing processes. The drift region structure with laterally offset wells can be formed using conventional ion implantation techniques already present in standard fabrication lines, allowing the same process equipment and methodologies to serve both conventional and high voltage device manufacturing without requiring dedicated additional process steps.
Solution Approach 2:
The patent applies parameter changes by modifying the spatial coordinates of well formation during ion implantation. By adjusting the lateral positioning parameters of the second conductive type well relative to the first conductive type well, the device achieves enhanced breakdown voltage through optimized electric field control, while utilizing the same ion implantation process parameters and equipment as conventional devices.
3Adaptability or versatility
If high voltage devices are integrated with low voltage devices using common process steps, then manufacturing flexibility is improved, but breakdown voltage is limited
Solution Approach 1:
The patent applies local quality by creating a specific structural configuration in the drift region where part of the second conductive type well is positioned laterally offset from the first conductive type well. This localized structural differentiation enables enhanced breakdown voltage through optimized electric field distribution in specific regions, without requiring additional manufacturing processes across the entire device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves higher breakdown voltage and broader application range for high voltage devices while maintaining low manufacturing costs by ensuring the second conductive type well is fully depleted during operation, enhancing the device's operational capabilities.
Implementation Method 1
the second conductive type well includes a well lower surface, which has a first part and a second part, wherein the first part is located above the buried layer and electrically coupled to the buried layer, and the second part forms a PN junction with the substrate
Implementation Method 2
the second conductive type well is substantially depleted when the high voltage device operates in an OFF condition
Data Source
AI summary
The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device is formed in a first conductive type substrate, wherein the substrate has an upper surface. The high voltage device includes: a second conductive type buried layer, which is formed in the substrate; a first conductive type well, which is formed between the upper surface and the buried layer; and a second conductive type well, which is connected to the first conductive type well and located at different horizontal positions. The second conductive type well includes a well lower surface, which has a first part and a second part, wherein the first part is directly above the buried layer and electrically coupled to the buried layer; and the second part is not located above the buried layer and forms a PN junction with the substrate.