High-Voltage Calibration for Precise Analog Neural Memory Programming
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Solution Overview
Problem
The challenge in developing artificial neural networks for high-performance information processing lies in the lack of adequate hardware technology, particularly in achieving high computational parallelism with energy efficiency, as existing digital systems are costly and energy-inefficient compared to biological networks, and CMOS analog circuits are too bulky for large numbers of neurons and synapses.
Innovation Solution
A high voltage generation system and algorithm are developed to compensate for varying voltage and current needs in analog neural memory systems by using non-volatile memory arrays with CMOS technology, allowing for precise programming and erasing of memory cells, enabling continuous and fine-tuned weight adjustments in neural networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital supercomputers or specialized graphics processing unit clusters are used to achieve high computational parallelism, then computational capability is improved, but cost and energy consumption increase significantly
Solution Approach 1:
The patent replaces digital computational systems with analog neural memory arrays that perform computations through physical electrical phenomena. Memory cells directly compute matrix-vector multiplications using conductance values and current flows, eliminating the need for digital processing and significantly reducing energy consumption while maintaining high computational parallelism
Solution Approach 2:
The patent changes the operational parameters of memory cells from digital switching states to analog conductance values. By programming memory cells to represent continuous weight values and using these conductance values directly for computation, the system achieves energy-efficient analog computing that mimics biological neural networks
2Use of energy by moving object
If CMOS analog circuits are used to reduce energy consumption, then energy efficiency is improved, but device area increases making them too bulky for large numbers of neurons and synapses
Solution Approach 1:
The patent makes standard CMOS memory cells perform multiple functions: they store data, represent synaptic weights, and perform analog computations simultaneously. This multi-functionality eliminates the need for separate analog circuitry, achieving energy efficiency without increasing device area beyond what is already required for digital memory operations
Solution Approach 2:
The patent uses existing CMOS memory cell structures and replicates them in large arrays to achieve the required computational scale. By copying and scaling proven memory cell designs rather than creating new analog circuits, the system maintains compact form factor while achieving the necessary computational capacity
3Manufacturing precision
If high voltages are applied for programming operations in analog neural memory, then programming precision is improved, but operating temperature increases and energy consumption rises
Solution Approach 1:
The patent applies compensation current in advance during programming operations to counteract the temperature rise that would otherwise occur from high voltage pulses. By pre-applying compensation current based on the number of cells being programmed, the system maintains stable operating temperature while achieving precise programming
Solution Approach 2:
The patent implements a feedback mechanism where the system monitors the number of cells to be programmed and automatically adjusts the compensation current accordingly. This closed-loop control ensures that programming precision is maintained while preventing excessive temperature increase, as the compensation is precisely matched to the actual programming load
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient and precise programming of neural networks, reducing energy consumption and operating temperature variations, thereby enhancing the performance and efficiency of deep learning artificial neural networks.
Implementation Method 1
Each of the plurality of memory cells is configured to store a weight value corresponding to a number of electrons on the floating gate
Data Source
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AI summary
Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. Different calibration algorithms and systems are also disclosed. Optionally, compensation measures can be utilized that compensate for changes in voltage or current as the number of cells being programmed changes.