High Voltage Step-Down Regulator with Breakdown Protection
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Solution Overview
Problem
High voltage step-down regulators in non-volatile memory systems face challenges in minimizing voltage drop across high voltage output transistors, leading to potential breakdown and design rule violations, especially when generating lower supply levels for NAND memory circuits.
Innovation Solution
Incorporating a high voltage depletion type NMOS device in series with the high voltage output transistor, where the gate of the depletion device is connected to the output node for feedback control, reduces the voltage drop across the high voltage output transistor and includes a current mirror arrangement to protect the output transistor from breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a high voltage output transistor is used to step down high voltage to low voltage, then voltage regulation is achieved, but the voltage drop across the transistor causes design rule violations and potential breakdown
Solution Approach 1:
The patent divides the single high voltage output transistor into two separate transistors: a first high voltage transistor for current mirroring and a second high voltage transistor for actual output. This segmentation allows the voltage drop to be distributed across multiple devices, reducing the stress on any single transistor and preventing breakdown while maintaining regulation capability.
Solution Approach 2:
The patent introduces a depletion mode transistor as an intermediary device between the high voltage supply and the output transistor. This depletion device acts as a voltage buffer, reducing the voltage drop across the main output transistor and preventing it from entering the breakdown region while still enabling effective voltage regulation.
2Manufacturing precision
If the voltage drop across the high voltage output transistor is reduced, then design rules are satisfied, but the ability to regulate voltage effectively is compromised
Solution Approach 1:
The patent implements a feedback mechanism where the output voltage is monitored and fed back to control the gate of the high voltage output transistor. This feedback loop allows the transistor to dynamically adjust its conduction to maintain the desired output voltage while operating within safe voltage drop limits that satisfy design rules.
Solution Approach 2:
The patent uses dynamic control of the transistor gate voltage to adapt the transistor's on-resistance based on operating conditions. By dynamically adjusting the gate voltage in response to load changes and voltage drop conditions, the system maintains design rule compliance while preserving effective voltage regulation across varying operating points.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the voltage drop across the high voltage output transistor, allowing for a wide range of regulated output voltages without violating design rules, thereby enhancing the reliability and efficiency of the step-down regulation process.
Implementation Method 1
the high voltage output transistor is connected to the high voltage supply level through a depletion device, wherein the control gate of the depletion device is connected to the output node, thereby reducing the voltage drop across the high voltage output transistor
Data Source
AI summary
A high voltage step regulator, such as would be used to provide a regulated low voltage (on the order of a few volts) from a high voltage external supply (e.g. 12V), is presented. To protect the output transistor, through which the output is provided from the input, from breakdown, a depletion type device is connected between the supply and the output transistor. The control gate of the depletion device is then connected to the output level of the regulator. This reduces the voltage drop across the output transistor, helping to avoid violating design rules (EDR) on how great a voltage differential can be placed across the output transistor. Examples of applications for such a circuit are for various operating voltages on a non-volatile memory chip operating with a high voltage power supply.