High-Voltage Film Resistor Networks With Dielectric Isolation
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Solution Overview
Problem
Existing resistor networks for high voltage sensing applications require large spacings between resistors to prevent air breakdown, leading to increased cost and space usage in electronic devices.
Innovation Solution
The integration of a multilevel metallization structure over a semiconductor layer, featuring a film resistor connected to resistor terminals via vertical interconnects, and encapsulated within a dielectric seal structure to prevent air breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete resistor networks are soldered onto a host PCB with large spacings between resistor ends, then air breakdown is prevented, but cost increases and space usage increases
Solution Approach 1:
The patent transitions from planar PCB-mounted discrete resistors to a three-dimensional integrated circuit structure with multiple metallization layers stacked vertically. This dimensional change allows resistors to be positioned in different layers with vertical interconnects, enabling compact spacing while maintaining electrical isolation through dielectric layers, thus preventing air breakdown without requiring large horizontal spacings.
Solution Approach 2:
The patent integrates multiple functions into a single IC package: high voltage resistors, low voltage resistors, and sensing circuits are combined on the same substrate with shared dielectric and metallization structures. This merging eliminates the need for separate discrete resistor networks on the PCB, reducing overall space usage while maintaining reliability through controlled dielectric spacing.
2Reliability
If discrete resistor networks are soldered onto a host PCB with large spacings between resistor ends, then air breakdown is prevented, but manufacturing cost increases
Solution Approach 1:
The patent combines high voltage and low voltage resistor networks into a single integrated circuit package with shared fabrication processes. Multiple resistor elements are formed using the same thin film deposition and patterning steps on a common substrate, eliminating the need for separate discrete components and their associated soldering operations, thereby reducing manufacturing cost while maintaining reliability.
Solution Approach 2:
The IC structure serves multiple functions: it provides both high voltage sensing capability and low voltage reference functionality within a single package. The dielectric layers and metallization structures serve dual purposes of electrical connection and electrical isolation, reducing the overall component count and simplifying manufacturing while ensuring prevention of air breakdown.
3Area of stationary object
If film resistors are integrated within a multilevel metallization structure with vertical interconnects, then space usage is reduced, but device complexity increases
Solution Approach 1:
The patent utilizes vertical stacking of metallization layers to achieve compact integration. Resistors in different layers are connected through vertical vias, enabling three-dimensional routing that reduces the horizontal footprint. The dielectric layers provide both structural support and electrical isolation, managing the complexity of the multilevel structure through systematic layering.
Solution Approach 2:
The patent implements a nested structure where dielectric layers enclose and isolate conductor layers, which in turn contain resistor elements. This nested arrangement of dielectric-conductor-dielectric-resistor patterns allows compact vertical integration while maintaining clear electrical separation, managing device complexity through hierarchical structuring.
4Ease of manufacture
If film resistors are integrated within a multilevel metallization structure with vertical interconnects, then manufacturing cost is reduced, but device complexity increases
Solution Approach 1:
The patent combines the fabrication of high voltage and low voltage resistor networks into a single integrated manufacturing process. All resistor elements, metallization layers, and dielectric structures are formed using unified thin film deposition, patterning, and etching steps, eliminating the need for separate assembly operations and reducing manufacturing cost despite the multilevel structure's apparent complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables compact, cost-effective high voltage resistor networks within integrated circuits, preventing air breakdown and ensuring reliable high voltage isolation.
Implementation Method 1
a dielectric seal structure that encloses the film resistor... preventing air breakdown
Data Source
AI summary
An integrated circuit includes a metallization structure over a semiconductor layer and having a dielectric layer, a pad metal layer on the dielectric layer and including first and second resistor terminals, and a film resistor over the pad metal layer, a first location of the film resistor connected to the first resistor terminal by a first vertical interconnect, and a second location of the film resistor connected to the second resistor terminal by a second vertical interconnect. An integrated circuit includes a metallization structure over a semiconductor layer and having a film resistor, a first resistor terminal, a second resistor terminal that is spaced apart from the first resistor terminal, and a dielectric seal structure that encloses the film resistor, wherein the film resistor is located on a first sublayer of the dielectric seal structure, and a second sublayer of the dielectric seal structure is on the film resistor.