High Voltage Semiconductor Device With Deep Trench Isolation
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Solution Overview
Problem
Conventional high-voltage semiconductor devices require non-operation regions for electrical isolation, which limits integration density and operational efficiency due to the need for additional space and increased device size.
Innovation Solution
The implementation of a deep trench isolation (DTI) process to form an isolation layer that surrounds active regions, allowing the gate electrode to extend over the isolation layer, thereby eliminating the need for non-operation regions and enhancing integration density while maintaining sufficient operating voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If junction isolation is used to isolate adjacent active regions, then electrical isolation between active regions is achieved, but non-operation regions are required which reduces integration density
Solution Approach 1:
The patent transitions from planar junction isolation to three-dimensional deep trench isolation. The isolation layer extends vertically into the substrate, providing electrical isolation through the third dimension (depth) rather than relying solely on lateral separation. This allows active regions to be closely spaced horizontally while maintaining adequate isolation through the vertical trench structure.
Solution Approach 2:
The patent introduces an isolation layer as an intermediary structure between adjacent active regions. This isolation layer, formed by deep trench isolation, acts as a physical and electrical barrier that separates active regions without requiring non-operation regions. The gate electrode extends over this isolation layer, allowing the isolation function to be performed by the intermediate structure rather than by spacing constraints.
2Reliability
If non-operation regions are included to ensure isolation and operating voltage, then sufficient operating voltage is maintained, but device area increases reducing integration density
Solution Approach 1:
The patent uses vertical extension of the isolation layer into the substrate to provide both voltage handling capability and electrical isolation. By moving the isolation function into the depth dimension, the patent eliminates the need for lateral non-operation regions, thereby reducing overall device area while maintaining sufficient operating voltage through the three-dimensional isolation structure.
Solution Approach 2:
The deep trench isolation structure serves multiple functions simultaneously: it provides electrical isolation between active regions, maintains sufficient operating voltage through its depth, and enables gate electrode extension for enhanced control. This multi-functional isolation structure replaces the need for separate non-operation regions, achieving voltage handling and isolation without increasing device area.
3Productivity
If gate electrode is extended over isolation layer, then integration density is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary formation of the deep trench isolation structure before extending the gate electrode. By establishing the isolation layer and trench structure in advance, the subsequent gate extension process becomes more manageable. The preliminary isolation structure provides a defined boundary and support for the extended gate, simplifying the overall manufacturing sequence despite the enhanced final structure.
Data Source
AI summary
A semiconductor device includes a substrate with one or more active regions and an isolation layer formed to surround an active region and to extend deeper into the substrate than the one or more active regions. The semiconductor further includes a gate electrode, which covers a portion of the active region, and which has one end portion thereof extending over the isolation layer.