High Voltage Semiconductor Device Mixed Doped Well Structure
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Solution Overview
Problem
High voltage semiconductor devices, particularly LDMOS transistor devices, face limitations in electrical performance due to their planar structure, which affects their operational efficiency and integration capabilities in high voltage environments.
Innovation Solution
The implementation of a semiconductor device structure that includes a semiconductor substrate with a gate structure, a first doped well, a second doped well, and a mixed doped well, where the mixed doped well is positioned between the first and second doped wells, each containing different conductivity type dopants, to enhance electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a planar structure is used for LDMOS transistor devices, then integration with other integrated circuits is convenient, but electrical performance and operational efficiency are limited
Solution Approach 1:
The patent applies local quality by creating different doped regions (first doped well with first conductivity type, second doped well with second conductivity type, and mixed doped well with both types) at specific locations within the semiconductor substrate. This allows different regions to have optimized electrical properties for their specific functions while maintaining overall planar structure for integration compatibility.
2Strength
If high voltage capability is achieved through conventional structures, then breakdown voltage is improved, but current handling capability and operational efficiency deteriorate
Solution Approach 1:
The patent merges multiple doped regions with different conductivity types into a single integrated structure. The mixed doped well combines both first and second conductivity type dopants, creating a region that simultaneously contributes to breakdown voltage enhancement and current handling capability, rather than using separate structures for each function.
Solution Approach 2:
The patent uses composite doping structures where the mixed doped well contains both first conductivity type dopant and second conductivity type dopant. This composite approach creates a region with combined electrical properties that optimize both high voltage breakdown characteristics and current conduction capabilities.
Data Source
AI summary
A high voltage semiconductor device includes a semiconductor substrate, a first doped well, a second doped well, a mixed doped well, and a gate structure. The first, the second, and the mixed doped wells are disposed in the semiconductor substrate. At least a part of the first doped well and at least a part of the second doped well are located at two opposites sides of the gate structure in a horizontal direction respectively. The mixed doped well are located between the first doped well and the second doped well. The first and the second doped well include a first conductivity type dopant and a second conductivity type dopant respectively. The mixed doped well includes a mixed dopant. A part of the mixed dopant is identical to the first conductivity type dopant, and another part of the mixed dopant is identical to the second conductivity type dopant.