High Voltage Transistor STI Protrusion for Leakage Reduction
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Solution Overview
Problem
High voltage transistors face challenges in maintaining insulation effectiveness due to sharp corners in the Shallow Trench Isolation (STI) structure, leading to potential current leakage and performance issues under high voltage operations.
Innovation Solution
The design incorporates a protruding part at the bottom of the STI structure within the indent region, creating a step-like structure that smooths the electric field distribution and combines the gate insulating layer with the STI structure to enhance insulation, while maintaining a lower height to avoid gate structure removal during subsequent fabrication processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate insulating layer is made thicker to maintain insulation under high voltage, then the insulation effect is improved, but the device complexity and fabrication difficulty increase
Solution Approach 1:
The gate insulating layer is segmented into two parts: a first gate insulating layer and a second gate insulating layer with different dielectric constants. The first layer provides baseline insulation while the second layer with higher dielectric constant enhances the insulation effect more efficiently, reducing the need for excessive thickness and simplifying the overall structure.
Solution Approach 2:
The patent uses a composite gate insulating layer structure combining materials with different dielectric properties. This composite approach allows achieving superior insulation performance under high voltage without requiring uniform thickening of the entire insulating layer, thereby maintaining structural efficiency and reducing fabrication complexity.
2Manufacturing precision
If the STI structure has sharp corners to simplify fabrication, then the manufacturing precision is improved, but current leakage occurs due to electric field concentration
Solution Approach 1:
The patent introduces a rounded corner structure at the STI region, replacing sharp corners with curved transitions. This curvature eliminates electric field concentration points that cause current leakage, while the rounding can be achieved through standard fabrication processes like chemical mechanical polishing (CMP), maintaining manufacturing precision.
Solution Approach 2:
The patent modifies the geometric parameters of the STI structure by introducing a rounded corner radius. This parameter change transforms the sharp corner geometry into a curved geometry, fundamentally altering the electric field distribution to prevent concentration and subsequent current leakage, while remaining compatible with existing fabrication capabilities.
3Productivity
If the transistor size is reduced to improve integration, then the productivity is improved, but maintaining good high voltage performance becomes more difficult
Solution Approach 1:
The patent applies local quality enhancement by introducing a rounded corner structure specifically at the STI region where electric field concentration occurs. This localized structural modification targets the critical area for high voltage performance without affecting the overall transistor dimensions, allowing size reduction elsewhere while maintaining high voltage reliability through localized optimization.
Data Source
AI summary
A high voltage transistor including a substrate is provided, and the substrate has an indent region. A doped region is disposed in the substrate at both sides of the indent region. A shallow trench isolation (STI) structure is disposed in the doped region of the substrate, at a periphery region of the indent region, wherein a portion of a bottom of the STI structure within the indent region has a protruding part down into the substrate. A gate insulating layer is disposed on the substrate at a central region of the indent region other than the STI structure, wherein the gate insulating layer has a protruding portion. A gate structure is disposed on the gate insulating layer and the STI structure within the indent region, covering the protruding portion of the gate insulating layer.