High-Voltage Selecting Circuit With Zero-Drop PMOS Gate Control
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Solution Overview
Problem
Conventional high-voltage selecting circuits experience a voltage drop when input voltages are equal, leading to incorrect output voltage levels and leakage currents when one input voltage is higher than the other.
Innovation Solution
Incorporating auxiliary NMOS and PMOS transistors to ensure correct output voltage selection without voltage drop and to prevent leakage currents by controlling the gate voltages of PMOS transistors, utilizing auxiliary transistors to enhance body effects and threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PMOS transistors are used for high-voltage selection, then the circuit can select higher input voltages, but a voltage drop occurs when input voltages are equal due to parasitic diodes
Solution Approach 1:
An auxiliary NMOS transistor is introduced as an intermediary component to control the gate voltage of the PMOS transistor. This auxiliary transistor acts as a mediator that adjusts the gate voltage dynamically based on input voltage levels, preventing the parasitic diode from conducting and eliminating the voltage drop while maintaining accurate output voltage selection.
2Reliability
If both PMOS transistors are turned off when input voltages are equal, then the circuit avoids leakage current, but the output voltage drops due to parasitic diode conduction
Solution Approach 1:
The gate voltage parameter of the PMOS transistor is dynamically changed by the auxiliary NMOS transistor based on the relationship between input voltages. When input voltages are equal, the auxiliary transistor adjusts the gate voltage to keep the PMOS transistor in a controlled on-state, preventing parasitic diode conduction and maintaining the correct output voltage level without excessive leakage current.
3Device complexity
If the gate voltage of PMOS transistor is not controlled, then the circuit structure is simple, but leakage current occurs when one input voltage is higher than the other
Solution Approach 1:
The auxiliary NMOS transistor provides feedback control by monitoring the input voltage levels and adjusting the gate voltage of the PMOS transistor accordingly. This feedback mechanism ensures that the PMOS transistor operates in the appropriate state (on or off) based on the voltage relationship between inputs, preventing leakage current while maintaining a relatively simple circuit structure.
Data Source
AI summary
A high-voltage selecting circuit generates an output voltage with no voltage drop by means of an auxiliary NMOS transistor turning on the corresponding selecting PMOS transistor of the high-voltage selecting circuit when the voltage levels of a first input voltage and a second input voltage are equal. In addition, when one of the first input voltage and the second input voltage is higher than the other one, the high-voltage selecting circuit avoids the leakage current by means of an auxiliary PMOS transistor turning off the corresponding selecting PMOS transistor of the high-voltage selecting circuit. In this way, the high-voltage selecting circuit can correctly generate the output voltage according to the first input voltage and the second input voltage, and avoid the leakage current at the same time.