Higher-Radix GPU FFT Registers for Faster DSP Offload
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Solution Overview
Problem
Existing graphics processing units (GPUs) face challenges in efficiently performing fast Fourier transform (FFT) calculations, particularly in real-time applications like radar processing, due to limitations in hardware availability and memory usage, which can bottleneck other processing tasks.
Innovation Solution
Offload FFT calculations from digital signal processors (DSPs) to GPUs, utilizing higher radix butterfly iterations and consecutive butterfly merges, optimizing FFT algorithms for GPUs with hardware-dependent implementations that utilize GPU registers instead of memory for computation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If FFT calculations are performed on DSPs, then processing accuracy is maintained, but processing speed is limited and memory usage increases
Solution Approach 1:
The patent extracts FFT calculation operations from the DSP and relocates them to the GPU. By taking out the computational workload from the DSP, the system achieves faster processing speeds while reducing the memory burden on the DSP, directly resolving the contradiction between processing speed and memory usage.
Solution Approach 2:
The GPU serves as an intermediary processing unit between the DSP and the final output. It handles the computationally intensive FFT operations that the DSP cannot perform efficiently, enabling high-speed processing without consuming DSP memory resources.
2Productivity
If higher radix butterfly iterations are used, then FFT computation speed increases, but device complexity increases
Solution Approach 1:
The patent changes the radix parameter from traditional radix-2 to higher radix values (radix-4, radix-8, radix-16, radix-32). This parameter change fundamentally alters the computation structure to achieve higher throughput. The GPU's parallel architecture naturally accommodates these parameter changes, converting the increased algorithmic complexity into performance benefits through parallel execution.
Solution Approach 2:
The implementation dynamically adapts the butterfly iteration structure to match the GPU's parallel processing capabilities. By making the algorithm flexible and adaptable to different radix values, the system can optimize throughput while managing complexity through the GPU's parallel execution model.
3Speed
If GPU registers are used instead of memory, then computation speed increases, but hardware requirements increase
Solution Approach 1:
The patent leverages the GPU's register file as a high-speed storage medium, effectively copying the functionality of traditional memory into the compute unit. Registers provide fast storage for intermediate computation results, enabling high-speed FFT operations without requiring external memory access, thus meeting the hardware requirements through the GPU's inherent register architecture.
Data Source
AI summary
Aspects presented herein relate to methods and devices for data or graphics processing including an apparatus, e.g., a GPU. The apparatus may allocate at least one data set in a plurality of data sets to at least one work item in a set of work items. The apparatus may also load the allocated at least one data set to a set of registers associated with the set of work items. Further, the apparatus may compute an operation for each of the set of registers based on the loaded at least one data set. The apparatus may also arrange an order of the at least one data set based on the computation of the operation for each of the set of registers. The apparatus may also store the at least one data set based on the arrangement of the order of the at least one data set.