Hardware-in-the-Loop System Core Segmentation
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Solution Overview
Problem
Existing hardware-in-the-loop (HIL) simulation systems struggle to meet real-time control criteria due to computationally intensive models, which can lead to performance degradation and unreliable evaluation of devices under test.
Innovation Solution
A HIL system is designed with two computer cores: one core executes instructions that meet real-time intervals, while the other core handles computationally intensive tasks that may exceed these intervals, ensuring that the system can reliably evaluate real-time control systems without interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If computationally intensive models are used in HIL simulation, then measurement precision and reliability of evaluation are improved, but the system cannot meet real-time timing requirements
Solution Approach 1:
The HIL simulation system is segmented into multiple computer cores: one core dedicated to executing control model instructions that must meet real-time intervals, and another core for executing physical system models that are computationally intensive. This segmentation allows each core to specialize in specific tasks, ensuring that real-time control evaluation is not delayed by intensive computations.
Solution Approach 2:
A communication interface acts as an intermediary between the first computer core (executing real-time control instructions) and the second computer core (executing intensive simulations). This intermediary enables data exchange and coordination while maintaining the real-time performance of critical control functions independent of simulation computational load.
2Productivity
If all executable instructions are executed on a single computer core, then device complexity is reduced, but the system cannot simultaneously meet real-time intervals and handle intensive computations
Solution Approach 1:
The system divides executable instructions into two distinct groups based on their timing requirements: instructions that must execute within real-time intervals are separated from computationally intensive instructions. This segmentation enables parallel execution on multiple cores, increasing overall productivity while maintaining manageable complexity through clear functional separation.
Solution Approach 2:
The HIL simulation system is designed with multi-functional computer cores that can handle different types of computational tasks. Each core is optimized for specific functions (real-time control vs. intensive simulation), but the overall system provides universal capability to handle both types of workloads simultaneously through coordinated operation.
Data Source
AI summary
Methods and systems for building and operating a hardware-in-the-loop (HIL) system are described. In one example, executable instructions to model a controller, operate a controller area network (CAN) bus, and process analog signals are separated from executable instructions that simulate or model a physical system. The executable instructions are separated so that they may be executed via different computer cores so that a real-time process of the HIL system may not be interfered.