Hi-PHY Microservices Mapping Across Heterogeneous Processing Nodes

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Solution Overview

Problem

Conventional physical layer implementations in wireless communication systems face inefficiencies due to tight integration between hardware and software components, non-standard interfaces, lack of decoupling, and difficulty in scaling and synchronizing operations across heterogeneous environments, limiting deployment flexibility and resource utilization.

Innovation Solution

Implementing high physical layer operations using a cloud-native microservices framework that segregates baseband processing into independent functional blocks, allowing deployment on diverse processing elements like GPUs, FPGAs, and ASICs, with stateless microservices communicating through APIs for efficient scaling and synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If physical layer operations are implemented using tightly integrated hardware and software components, then processing efficiency is improved, but deployment flexibility and adaptability deteriorate

Engineering Contradiction:

Improveprocessing efficiencyVSAvoiddeployment flexibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent segments the physical layer baseband processing into multiple independent functional blocks (e.g., channel coding, modulation, MIMO processing, resource mapping) that can be independently deployed and configured. Each functional block operates as a separate software module that can be selectively instantiated based on deployment requirements, thereby achieving both processing efficiency through specialized implementation and deployment flexibility through modular architecture.

Inventive Principle:

Principle #1Segmentation

2Speed

If conventional tightly integrated physical layer implementations are used, then processing speed is maintained, but scalability and resource utilization deteriorate

Engineering Contradiction:

Improveprocessing speedVSAvoidscalability

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic architecture where functional blocks can be selectively activated, deactivated, or scaled based on real-time network conditions and service requirements. The system can dynamically allocate processing resources by instantiating additional functional block instances or adjusting the configuration of existing blocks, enabling scalability while maintaining processing speed through on-demand resource allocation.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If standardized interfaces and decoupling are implemented in physical layer operations, then adaptability and ease of operation are improved, but system complexity increases

Engineering Contradiction:

ImproveadaptabilityVSAvoidsystem complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements universal standardized interfaces (e.g., RESTful APIs, message queues) that enable all functional blocks to communicate through common protocols regardless of their specific processing functions. This universal interface layer abstracts the complexity of inter-block communication, allowing functional blocks to be independently developed, deployed, and managed while maintaining system coherence through standardized interaction patterns.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If compute-intensive physical layer processing is performed on general-purpose computing resources, then adaptability is improved, but processing efficiency and power utilization deteriorate

Engineering Contradiction:

ImproveadaptabilityVSAvoidprocessing efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent applies local quality by allowing different functional blocks to be implemented with locally optimized characteristics - some blocks can be executed on general-purpose processors for flexibility, while compute-intensive blocks can be offloaded to specialized hardware accelerators (GPUs, FPGAs, ASICs) or cloud-based processing resources. Each functional block's implementation can be tailored to its specific computational requirements, achieving optimal processing efficiency while maintaining overall system adaptability.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS12587816B2System for implementing physical layer operations as microservices in a mobile network

Publication Date: 2026.03.24 TEJAS NETWORKS LTD

AI summary

Various embodiments of the disclosure described a system and method that implements Hi-PHY operations in a mobile network using a microservices-based architecture across a variety of heterogeneous multi-core processing nodes. Further, the system and method facilitate the optimal mapping of microservices to each element (e.g., hardware processing element or the like) of the processing node(s) based on defined optimization targets associated with deployment constraints. The system and method described may enable the portability of Hi-PHY operations by separating the functionality and implementation aspects of each microservice. Further, the system and method enable the scalability of Hi-PHY operations by creating multiple instances of microservices to distribute the processing load efficiently. The system and method described further enable the dynamic implementation of Hi-PHY processing chains through the utilization of microservices.