Selective History Predictor Disable on Mode Transitions
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Solution Overview
Problem
Current prediction technologies in multi-core processors face complexity and security issues, particularly during mode transitions, where controlling branch history can lead to performance penalties and side-channel security vulnerabilities, such as leaking sensitive information.
Innovation Solution
Implementing selective blocking and unblocking of history-based predictors, specifically using a counter to manage the number of taken branches and adjusting predictor table usage based on mode transitions, to maintain security and minimize performance losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If history-based branch prediction is used during mode transitions, then branch prediction accuracy improves, but side-channel security vulnerabilities increase
Solution Approach 1:
The patent applies preliminary action by clearing the branch history buffer before a mode transition occurs. This proactive measure prevents sensitive information from being stored in the buffer during the transition, thereby eliminating side-channel security vulnerabilities before they can be exploited, while still allowing accurate branch prediction to resume after the transition.
Solution Approach 2:
The patent extracts or removes the branch history buffer contents specifically during mode transitions. By taking out the potentially sensitive historical branch information at the critical moment of mode transition, the system prevents security vulnerabilities without permanently disabling the branch prediction capability, thus maintaining prediction accuracy when needed.
2Object-affected harmful factors
If branch history is cleared during mode transitions, then side-channel security improves, but branch prediction performance deteriorates
Solution Approach 1:
The patent applies dynamics by making the branch history buffer state dynamic rather than static. The buffer is selectively cleared only during mode transitions when security is concerned, while remaining populated during normal operation to maintain prediction performance. This dynamic state management resolves the contradiction between security and performance.
Solution Approach 2:
The patent applies local quality by applying different treatments to branch history at different times and contexts. During mode transitions, the history is cleared for security; during normal operation, the history is preserved for performance. This localized, context-dependent approach allows the system to optimize for security when needed and performance when safe.
3Speed
If speculative execution is enabled to avoid pipeline stalls, then processing speed improves, but security vulnerabilities increase
Solution Approach 1:
The patent introduces the branch history buffer as an intermediary mechanism that mediates between speculative execution and security. By controlling what information is stored in this buffer during mode transitions, the system allows speculative execution to continue for performance while preventing the buffer from becoming a security vulnerability vector.
Data Source
AI summary
Techniques for selective disable of history-based predictors on mode transitions are described. An example apparatus comprises first circuitry to provide a history-based prediction, and second circuitry coupled to the first circuitry to selectively block and unblock a prediction from the first circuitry after a mode transition. Other examples are disclosed and claimed.