HKMG Boundary Structure for High- and Low-Voltage Isolation
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Solution Overview
Problem
High voltage and low voltage regions in integrated circuits face challenges with boundary defects, isolation damage, and contamination due to different gate dielectric thicknesses and patterning processes, leading to uneven surfaces and performance issues.
Innovation Solution
A boundary structure is introduced in the boundary region between low and high voltage regions, comprising an isolation structure, a first polysilicon component, a boundary dielectric layer, and a second polysilicon component with slanted sidewalls to minimize residue contamination and provide structural support, reducing dishing effects and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different gate dielectric thicknesses are used for high voltage and low voltage regions, then device performance is improved, but boundary defects and contamination occur
Solution Approach 1:
The patent divides the semiconductor device into distinct high voltage and low voltage regions with clearly defined boundaries. Each region has its own gate dielectric structure optimized for its voltage requirements, while the boundary region is separately structured to prevent contamination between regions.
Solution Approach 2:
The patent introduces a boundary region with specific structures (isolation structure, boundary dielectric layer, polysilicon components) that acts as an intermediary between high voltage and low voltage regions. This boundary structure prevents direct interaction and contamination between the two regions while maintaining overall device functionality.
2Ease of manufacture
If conventional patterning processes are used, then manufacturing is simplified, but isolation damage and residue contamination increase
Solution Approach 1:
The patent forms the boundary structure (isolation structure, boundary dielectric layer, polysilicon components) before completing the gate dielectric patterning process. This preliminary action prevents residue contamination during subsequent patterning steps by already establishing protective boundary structures in place.
Solution Approach 2:
The patent establishes the boundary structure with isolation features before the patterning process that could cause contamination. This preliminary anti-action prevents the harmful effects of isolation damage and residue contamination by having protective structures already in place to block or absorb potential contaminants.
3Device complexity
If boundary region is not properly structured, then device complexity is reduced, but dishing effects and uneven surfaces occur
Solution Approach 1:
The patent applies specific structures and materials only in the boundary region where needed, rather than uniformly across the entire device. The boundary dielectric layer, isolation structure, and polysilicon components are localized to the boundary region to provide surface support and prevent dishing effects only where voltage transitions occur.
Data Source
AI summary
The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed over the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.