Gate Dielectric Layout for HKMG High-Voltage Isolation Edges
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Solution Overview
Problem
The application of a high-k metal gate (HKMG) process in high-voltage semiconductor components leads to issues such as over-polishing and thinning of the gate dielectric layer edges, affecting the stability and performance of the semiconductor device, particularly due to the larger horizontal area required for high-voltage components.
Innovation Solution
Forming a first gate dielectric material layer in the substrate before creating trenches and isolation structures, ensuring the bottom surfaces of the isolation structures are at the same level as the element isolation structure with oblique portions, thereby preventing thinning at the gate dielectric layer edges and avoiding the need for a recess formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-k metal gate (HKMG) process is applied to high-voltage semiconductor components, then the performance of the semiconductor component is improved, but the gate dielectric layer edges experience thinning phenomenon which affects the stability and breakdown voltage
Solution Approach 1:
The gate dielectric layer is formed before the isolation structures are created. This preliminary formation allows the gate dielectric layer to be deposited conformally across the entire substrate surface, ensuring uniform thickness before any subsequent processing steps that might cause thinning at the edges.
Solution Approach 2:
The conventional sequence is inverted: instead of forming isolation structures first and then the gate dielectric layer, the patent forms the gate dielectric layer first and then creates the isolation structures. This inversion prevents the etching process from thinning the gate dielectric layer edges, as the gate dielectric layer is already in place and protected.
2Reliability
If a recess is formed in the substrate to prevent over-polishing of the metal gate, then the over-polishing issue is resolved, but an additional mask is required and the gate dielectric layer experiences thinning at the edges adjacent to STI structures
Solution Approach 1:
The gate dielectric layer is formed in advance before the isolation structures are created. This preliminary formation eliminates the need for subsequent recess formation and additional masks, as the conformal deposition ensures adequate dielectric thickness is achieved before any etching or isolation steps.
Solution Approach 2:
The patent extracts and eliminates the problematic recess formation step from the process flow. By forming the gate dielectric layer first, the need for recesses to prevent over-polishing is removed, simplifying the overall manufacturing process.
3Ease of manufacture
If the gate dielectric layer is formed after isolation structures are created, then the manufacturing process follows conventional sequence, but the gate dielectric layer thickness is non-uniform at the edges due to thinning phenomenon
Solution Approach 1:
The patent inverts the conventional manufacturing sequence by forming the gate dielectric layer before the isolation structures. This inversion resolves the thinning issue at the edges, as the gate dielectric layer is deposited conformally across the substrate before any etching or isolation steps that would cause thickness variation.
Data Source
AI summary
The present disclosure provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate including an element isolation structure defining first to third active regions and first to third elements respectively in the first to third active region. The first element includes a first gate dielectric layer embedded in the first active region of the substrate and isolation structures embedded in the substrate at opposite sides of the first gate dielectric layer. Bottom surfaces of the isolation structures include first portions at the same level as a bottom surface of the element isolation structure and second portions being oblique with respective to the first portions.