HKMG Semiconductor Gate Structure With Sidewall Isolation Layers
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Solution Overview
Problem
In the manufacturing of dynamic random access memory (DRAM) using high-k metal gate (HKMG) technology, the high-k material's internal defects make it difficult to adjust the threshold voltage directly, and the work function layer introduced for adjustment causes structural issues affecting device performance.
Innovation Solution
A semiconductor structure is designed with sidewall isolation layers on the work function layers of NMOS and PMOS transistors to prevent metal element diffusion, allowing for independent adjustment of work functions and improving performance by avoiding threshold voltage hard adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-k material is used in HKMG technology, then equivalent oxide thickness (EOT) and leakage are reduced, but internal defects in high-k material make it difficult to adjust threshold voltage
Solution Approach 1:
The gate structure is segmented into multiple functional layers: high-k dielectric layer for EOT control, work function layer for threshold voltage adjustment, and conductive layer for additional tuning. This segmentation allows each layer to independently fulfill its specific function without interfering with others, resolving the contradiction between leakage reduction and threshold voltage adjustability
Solution Approach 2:
A work function layer is introduced as an intermediary between the high-k dielectric layer and the conductive layer. This intermediate layer provides the necessary interface for threshold voltage adjustment through conventional ion implantation, while the high-k dielectric layer continues to provide EOT control and leakage reduction
2Ease of operation
If work function layer is introduced for threshold voltage adjustment, then threshold voltage control is improved, but structural constraints cause problems affecting device performance
Solution Approach 1:
The gate structure is designed with multiple adjustable layers (work function layer and conductive layer) that can be independently tuned through ion implantation. This dynamic adjustability allows optimization of threshold voltage without compromising device performance, as each layer can be precisely controlled to achieve the desired electrical characteristics
3Manufacturing precision
If sidewall isolation layers are added to prevent metal element diffusion, then work function adjustment precision is improved, but device structure complexity increases
Solution Approach 1:
Sidewall isolation layers are applied locally at critical interfaces where metal element diffusion occurs, rather than throughout the entire device structure. This localized approach prevents diffusion at key boundaries while minimizing the overall structural complexity and maintaining ease of manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of sidewall isolation layers effectively prevents metal element diffusion, enabling precise adjustment of work functions and enhancing the performance of the semiconductor structure by maintaining the integrity of the threshold voltage.
Implementation Method 1
the first work function layer is provided with a first sidewall isolation layer on a side facing the second work function layer
Data Source
AI summary
The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, an NMOS transistor, and a PMOS transistor. The NMOS transistor includes a first dielectric layer, a first work function layer, and a first conductive layer that are stacked in sequence. The PMOS transistor includes a second dielectric layer, a second work function layer, and a second conductive layer that are stacked in sequence.