HLL Compiler for Programmable IC Hardware Acceleration

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Solution Overview

Problem

Current digital hardware design using hardware description languages (HDLs) lacks high-level abstractions to manage complexity, making it difficult to efficiently implement modern designs, whereas high-level languages (HLLs) provide robust constructs for managing complexity but require manual hardware synthesis.

Innovation Solution

A method for compiling HLL programs that automatically retrieves and generates circuit designs and interface code for hardware-accelerated functions, allowing HLL function calls to be replaced with hardware implementations, eliminating the need for HDL code and interface writing, and generating configuration data for programmable ICs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If hardware description languages (HDLs) are used for digital hardware design, then hardware circuits can be described and implemented, but the lack of high-level abstractions makes it difficult to manage complexity and reduces designer productivity

Engineering Contradiction:

Improvedesigner productivityVSAvoidcomplexity management

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The patent introduces a compiler as an intermediary tool that translates high-level language (HLL) code into hardware description language (HDL) and generates hardware circuits. This mediator allows designers to work in HLL while automatically obtaining HDL implementations, resolving the contradiction between ease of operation and device complexity by automating the translation process.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces manual hardware synthesis processes with an automated compiler system. Instead of manually writing HDL code and performing synthesis, designers write HLL code and use the compiler to automatically generate hardware circuits, substituting manual mechanical processes with automated computational processes to improve productivity.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Ease of manufacture

If high-level languages (HLLs) are used to describe circuits, then designers can focus on algorithms rather than implementation details, but manual hardware synthesis is required which increases development time

Engineering Contradiction:

Improvedesign focus on algorithmsVSAvoiddevelopment time

Core Design Contradiction:

Ease of manufactureVSLoss of time

Solution Approach 1:

The compiler system performs self-service by automatically translating HLL code into hardware circuits without requiring manual intervention for synthesis. The system autonomously handles the translation, optimization, and code generation processes, eliminating the time loss associated with manual hardware synthesis while preserving the ability to focus on algorithms.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The compiler performs preliminary actions by pre-processing HLL code, optimizing it, and generating optimized hardware circuits automatically. This preliminary automated work eliminates the need for manual synthesis steps, reducing development time while maintaining algorithmic focus.

Inventive Principle:

Principle #10Preliminary action

3Adaptability or versatility

If hardware circuits are implemented using programmable ICs, then flexible hardware solutions can be achieved, but the complexity of integrating software and hardware components increases

Engineering Contradiction:

Improveflexible hardware solutionsVSAvoidintegration complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the system into distinct components: HLL software layer, compiler translator layer, and hardware circuit layer. This segmentation allows independent development and optimization of each layer while simplifying integration. The compiler handles the integration complexity by automatically generating hardware from HLL code, maintaining flexibility while reducing overall system integration complexity.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9223921B1Compilation of HLL code with hardware accelerated functions

Publication Date: 2015.12.29 XILINX INC

AI summary

In an example implementation, a method is provided for compiling an HLL source file. The HLL source file checked for function calls to a set of hardware-accelerated functions having hardware implementations specified in a hardware library. For each HLL function call to a hardware-accelerated function, a circuit design is retrieved from the hardware library. The circuit design specifies a hardware implementation of the hardware-accelerated function. HLL interface code configured to communicate with the hardware implementation of the hardware-accelerated function is also generated. The HLL function call to the hardware-accelerated function in the HLL source file is replaced with the generated interface code. The HLL source file is compiled to generate a program executable on a processor of a programmable IC. Configuration data is generated that implements the retrieved circuit designs on the programmable circuitry of the programmable IC.