High-Level Synthesis Burst Access for External Memory
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Solution Overview
Problem
Current technologies lack the ability to automatically generate an optimal hardware description language for integrated circuits that incorporate external memory, leading to inefficient processing of large data sets such as image processing and machine learning tasks.
Innovation Solution
A high-level synthesis device that includes a processor and memory, capable of analyzing high-level synthesis codes and reconstructing them to enable burst access to external memory, thereby generating efficient hardware description languages for integrated circuits with external memory integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If external memory is added to the integrated circuit to handle large data sets, then data processing capability is improved, but automatic generation of optimal hardware description language cannot be achieved
Solution Approach 1:
The high-level synthesis device automatically analyzes high-level synthesis codes and self-generates optimized hardware description language that incorporates external memory configuration and burst access control, eliminating the need for manual HDL writing while handling large data sets
Solution Approach 2:
The device performs preliminary analysis of access patterns in high-level synthesis codes before hardware generation, pre-configuring external memory interfaces and burst access control logic to optimize data processing capability from the design stage
2Ease of manufacture
If conventional memory access methods are used, then implementation simplicity is maintained, but processing efficiency deteriorates
Solution Approach 1:
The patent combines conventional memory access with burst access control by integrating access pattern analysis and burst access determination into the high-level synthesis code adjustment process, maintaining implementation simplicity while dramatically improving processing efficiency for large data sets
Solution Approach 2:
The device dynamically changes memory access parameters by analyzing access patterns and automatically generating control logic that switches between conventional and burst access methods, optimizing processing efficiency without complicating implementation
Data Source
AI summary
This high-level synthesis device, which has a processor and a memory, and generates a hardware description code that describes the configuration of an integrated circuit connected to an external memory, comprises a high-level synthesis code adjustment unit which receives a high-level synthesis code that describes a process to be executed by the integrated circuit and an external memory access variable for exchanging data with the external memory, analyzes the high-level synthesis code, and reconstructs the high-level synthesis code on the basis of the analysis result, wherein the high-level synthesis code adjustment unit includes: a burst access determination unit that analyzes the external memory access variable in the high-level synthesis code, and determines whether burst access to the external memory is possible; and a code reconstructing unit that adds a code for executing burst access to the high-level synthesis code, for the external memory access variable capable of being burst accessed.