High-Level Synthesis Circuit Sharing for Chip Area Reduction

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Solution Overview

Problem

Current logic synthesis tools face challenges in efficiently translating behavioral descriptions of circuits into structural descriptions, leading to redundant circuitry and suboptimal performance due to lack of effective extraction and sharing of common functionalities across circuit portions.

Innovation Solution

The technology employs a High-Level Synthesis (HLS) flow that identifies commonalities across multiple circuit portions, synthesizing a shared circuit portion and generating interfaces to facilitate access, thereby reducing redundant circuitry and improving performance by organizing circuit descriptions into a different hierarchical structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional logic synthesis tools translate behavioral descriptions directly into structural descriptions without extraction and sharing, then the translation process is simpler, but redundant circuitry is generated and manufacturing precision deteriorates

Engineering Contradiction:

Improvestructural description qualityVSAvoidextraction and sharing process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The synthesis process is segmented into distinct phases: behavioral description analysis, commonality extraction, shared circuit portion identification, and structural description generation. This segmentation allows complex functionality to be broken down into manageable steps, improving precision while controlling complexity through systematic processing stages.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Common functional elements are extracted from the behavioral description and identified as shared circuit portions. This extraction process removes redundancy by identifying and isolating commonalities across multiple circuit portions, directly improving manufacturing precision by eliminating redundant circuitry while managing complexity through automated pattern recognition.

Inventive Principle:

Principle #2Taking out (Extraction)

2Area of stationary object

If common functionalities are not shared across circuit portions, then the circuit design is simpler, but chip area efficiency deteriorates

Engineering Contradiction:

Improvechip area efficiencyVSAvoidcircuit hierarchy complexity

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

Multiple circuit portions that share common functionalities are merged by identifying and instantiating shared circuit portions. This combining approach reduces the total chip area by eliminating redundant implementations of common functions, while the hierarchical structure manages complexity through organized reuse of shared components across different circuit sections.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

Shared circuit portions are designed with universal interfaces and functionalities that allow them to serve multiple purposes across different circuit portions. This multi-functionality enables a single shared component to replace multiple dedicated components, improving chip area efficiency while maintaining manageable complexity through standardized interaction interfaces.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Speed

If behavioral descriptions are translated without hierarchical reorganization, then the synthesis process is faster, but timing performance deteriorates

Engineering Contradiction:

Improvesignal propagation speedVSAvoidsynthesis process time

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The synthesis process transitions from a flat translation approach to a hierarchical dimensional organization. By restructuring the circuit description into hierarchical levels with shared circuit portions at appropriate levels, signal paths are optimized across dimensions, improving timing performance while the systematic hierarchical approach manages synthesis time through organized processing.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

4Productivity

If redundant circuitry is present, then circuit reliability is maintained through redundancy, but productivity deteriorates due to inefficient resource utilization

Engineering Contradiction:

Improveresource utilization efficiencyVSAvoidcircuit functionality

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

Instead of creating entirely new circuit portions, the synthesis process copies and reuses existing shared circuit portions through standardized interfaces. This copying approach maintains reliability by preserving proven functional blocks while dramatically improving productivity through efficient resource utilization, as shared portions are reused rather than redundantly replicated.

Inventive Principle:

Principle #26Copying

Data Source

PatentUS8887111B2Extraction and sharing in high level synthesis

Publication Date: 2014.11.11 C2 DESIGN AUTOMATION

AI summary

Technology for translating a behavioral description of a circuit into a structural description of the circuit is disclosed. The behavioral description may describe the circuit in terms of the behavior, or other functionality, of multiple circuit portions, with at least some of the multiple circuit portions having multiple components. The technology includes determining components across the multiple circuit portions of the behavioral description that have commonalities, and synthesizing the structural description with a description of a shared circuit portion instead of individual structural descriptions of the components having the determined commonality. The synthesized structural description may be organized according to a different hierarchical structure than that of the behavioral description.