High-Level Synthesis With Execution Trace Hardware Generation

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Solution Overview

Problem

Conventional high-level synthesis methods fail to provide an execution trace function for hardware circuits implemented from behavioral descriptions, limiting the ability to acquire and record processing information during hardware execution.

Innovation Solution

A high-level synthesis device that generates hardware descriptions with an execution trace function by incorporating an execution trace specification description, allowing for trace processing and recording of execution-time information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-level synthesis method is used to generate hardware description, then processing performance is improved, but ability to acquire and record execution trace information deteriorates

Engineering Contradiction:

Improveprocessing performanceVSAvoidexecution trace information

Core Design Contradiction:

ProductivityVSLoss of information

Solution Approach 1:

The hardware description is segmented into behavioral description portion and execution trace description portion. The behavioral description portion contains the original functional logic, while the execution trace description portion separately handles trace information generation. This segmentation allows both processing performance and trace information acquisition to coexist without interference.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

An execution trace generation unit is introduced as an intermediary component within the information processing device. This unit receives operational information from the behavioral processing unit and generates execution trace information, acting as a mediator that captures trace data without affecting the primary processing function.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If hardware description is optimized for processing, then processing speed is improved, but ease of acquiring trace information deteriorates

Engineering Contradiction:

Improveprocessing speedVSAvoidease of acquiring trace information

Core Design Contradiction:

SpeedVSEase of operation

Solution Approach 1:

The hardware description is divided into distinct portions: behavioral description for processing logic and execution trace description for trace information. This segmentation enables the processing portion to be optimized for speed while the trace portion maintains ease of information acquisition through dedicated trace ports and structured output formats.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different portions of the hardware description are assigned different qualities: the behavioral description portion is optimized for processing speed with efficient logic implementation, while the execution trace description portion is designed with explicit trace ports and structured formats that facilitate easy information acquisition and recording.

Inventive Principle:

Principle #3Local quality

3Loss of information

If execution trace function is added to hardware description, then trace information acquisition is improved, but device complexity increases

Engineering Contradiction:

Improvetrace information acquisitionVSAvoidhardware description complexity

Core Design Contradiction:

Loss of informationVSDevice complexity

Solution Approach 1:

The execution trace function is implemented as a separate, segmented portion within the hardware description rather than integrating it throughout the entire system. The execution trace description portion is a self-contained module that receives minimal input from the behavioral portion and generates trace information independently, thereby limiting the increase in overall device complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The execution trace generation functionality is extracted as a distinct component with its own dedicated ports and processing logic. By taking out the trace generation function from the main behavioral processing path, the complexity is isolated and managed separately, allowing the core processing logic to remain simple while still providing comprehensive trace capabilities.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS20240248441A1High-level synthesis device, high-level synthesis method, and information processing device

Publication Date: 2024.07.25 MITSUBISHI ELECTRIC CORP

AI summary

A high-level synthesis processing unit of the high-level synthesis device according to the present disclosure performs high-level synthesis processing of generating the hardware descriptions based on specification descriptions including the behavioral description, a high-level synthesis specification description, and an execution trace specification description. The hardware descriptions include a behavioral processing hardware description, an execution trace mechanism unit description, and an execution trace mechanism common unit description. The execution trace specification description is described to correspond to the behavioral description.