HLS Vector Library for Variable-Length Circuit Synthesis
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Solution Overview
Problem
High-level synthesis for integrated circuits (ICs) faces challenges in efficiently generating circuit designs that can perform vector operations, particularly in handling variable vector lengths and complex data types, which limits parallel processing capabilities and memory efficiency.
Innovation Solution
A High-Level Synthesis (HLS) vector library is developed, allowing for the specification of vector operations in high-level programming languages, where the number of elements and data types can be arbitrarily defined, enabling the generation of circuit designs that perform operations in a single clock cycle and support complex data types like complex numbers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing libraries are used for high-level synthesis, then the design process is simpler, but the circuit cannot perform vector operations with variable lengths and complex data types efficiently
Solution Approach 1:
The patent implements dynamic vector length support through runtime parameter specification. The HLS vector library allows vector length to be defined as a compile-time parameter rather than a fixed constant, enabling the same circuit design to adapt to different vector lengths without redesign. This is achieved through parameterized template functions that generate hardware circuits with configurable dimensions, resolving the contradiction between adaptability and complexity by making the circuit dynamically configurable rather than statically fixed.
Solution Approach 2:
The patent changes the parameter specification approach from fixed constants to configurable parameters. By allowing vector length and data type to be specified as parameters during compilation, the system can generate optimized hardware circuits for different scenarios. This parameter-driven approach enables the circuit to handle complex data types (such as complex numbers, structures) and variable lengths efficiently, improving versatility while keeping the design process manageable through automated parameter instantiation.
2Productivity
If vector operations are implemented in hardware to achieve high throughput, then data processing speed increases, but the circuit design becomes more complex
Solution Approach 1:
The patent introduces an HLS vector library as an intermediary layer between high-level programming and hardware implementation. This library provides pre-defined vector operation functions that automatically translate high-level vector operations into optimized hardware circuits. The library acts as a mediator that handles the complexity of hardware design, allowing users to write simple high-level code while the library generates the complex underlying hardware circuits, thus achieving high throughput without exposing the user to hardware complexity.
Solution Approach 2:
The patent replaces manual hardware design processes with automated high-level synthesis. Instead of manually designing complex hardware circuits for vector operations, the system uses automated tools to translate high-level programming language code into hardware circuits. This substitution of automated synthesis for manual hardware design reduces the perceived complexity while maintaining high throughput performance, as the automation handles the complex optimization and circuit generation.
3Ease of operation
If fixed vector lengths are used in existing libraries, then the circuit design is simpler, but flexibility in vector sizes is lost
Solution Approach 1:
The patent creates a universal vector library that can handle multiple vector lengths and data types through a single set of functions. The library uses parameterized templates that instantiate appropriate hardware circuits based on the specified vector length and data type. This universal approach allows the same library functions to serve multiple purposes (different vector lengths, different data types) while maintaining simple high-level syntax, thus achieving both ease of operation and adaptability simultaneously.
Data Source
AI summary
A computer-based high-level synthesis (HLS) technique for circuit implementation includes providing a library as a data structure, wherein the library includes a function configured to perform a vector operation using one or more vector(s). The library can include a software construct defining a variable number of elements included in the vector(s). The number of elements can be determined from a variable included in an HLS application that uses the library to perform the function. The variable can specify an arbitrary positive integer value. The method also can include generating a circuit design from the HLS application. The circuit design can implement the function in hardware to perform the vector operation in one clock cycle. A data type of each element of the vector(s) may be specified as a further software construct within the library and determined from a further variable of the HLS application.