HMAC DRBG Circuit Key Segmentation for SCA Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Cryptographic implementations, particularly hash-based message authentication code (HMAC) deterministic random bit generators (DRBG), are vulnerable to Side-Channel Analysis (SCA) attacks, which compromise security by correlating secret keys with observable device information, leading to resource overhead and latency issues in countermeasures.
Innovation Solution
The implementation of a secure HMAC DRBG circuit that splits keys into shares and uses multiple hashing circuits with linear feedback shift registers (LFSRs) to generate random bits, masking countermeasures that make electrical measurements uncorrelated with the secret key, thereby protecting against SCA attacks with minimal resource and latency overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If masking countermeasures are implemented to protect against SCA attacks, then security against side-channel analysis is improved, but resource overhead and latency increase
Solution Approach 1:
The patent segments the key into multiple shares and distributes them across different hashing circuits. Each hashing circuit processes only a portion of the key material, making it impossible for an attacker to correlate side-channel measurements with the complete secret key. This segmentation approach provides SCA protection while minimizing the overhead of additional masking components.
Solution Approach 2:
The patent introduces an intermediary random value that is combined with the key shares through XOR operations. This intermediary element acts as a mediator that randomizes the intermediate values in the hashing process, ensuring that side-channel measurements cannot be correlated with the secret key without knowing the random value, which is never revealed.
2Reliability
If masking countermeasures are implemented to protect against SCA attacks, then security against side-channel analysis is improved, but latency increases
Solution Approach 1:
By segmenting the key into shares and processing them in parallel across multiple hashing circuits, the patent reduces the critical path length. The masking operations are distributed across time and space, allowing overlapping computations that minimize total latency while maintaining security.
Solution Approach 2:
The patent performs preliminary key sharing and random value generation before the main HMAC computation. This setup phase distributes the masking overhead across multiple operations, reducing the impact on the critical path and minimizing latency during the actual security-protected computation.
3Reliability
If multiple hashing circuits are used to implement HMAC, then security against SCA attacks is improved, but hardware resource consumption increases
Solution Approach 1:
The patent divides the HMAC computation into multiple hashing circuits that each process a specific share of the key. This segmentation allows the system to achieve SCA protection by distributing work across multiple simpler circuits rather than using a single complex circuit, reducing overall hardware resource consumption.
Solution Approach 2:
The patent designs the hashing circuits to serve multiple functions: they process key shares, perform masking operations, and generate intermediate values for the HMAC computation. This multi-functionality reduces the need for separate dedicated components, minimizing hardware overhead while maintaining security.
Data Source
AI summary
Secure hash-based message authentication code (HMAC) deterministic random bit generator (DRBG) architectures are provided. A circuit can include HMAC DRBG circuitry including a counter configured to increment based on a clock state and provide a counter output, and HMAC function circuitry coupled to the HMAC DRBG circuitry, the HMAC function circuitry including first and second hashing circuits, the HMAC function circuitry configured to implement an HMAC function using the first and second hashing circuits and the counter output, the HMAC function circuitry configured to split a key into first and second shares based on the counter output and provide the first share to the first hashing circuit and the second share to the second hashing circuit.