Host Memory Buffer Access Control for PCIe Contention
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Solution Overview
Problem
The use of host memory buffer (HMB) by solid state drives (SSDs) can improve performance but may lead to host performance issues due to contentions on shared resources like the PCIe bus, affecting overall system performance.
Innovation Solution
A system and method that adaptively adjusts the quality of service by identifying access needs and resource usage of HMB regions, imposing delays to reduce contentions, using an HMB access modification module within the SSD controller to limit throughput and maintain host responsiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the SSD uses host memory buffer (HMB) to improve performance, then storage performance and responsiveness are improved, but host performance deteriorates due to contentions on shared resources like PCIe bus
Solution Approach 1:
The HMB is divided into multiple regions with different access delay characteristics. The controller selectively applies different delay periods to different HMB regions based on workload type, allowing the system to segment the memory buffer into zones that can be accessed at different rates to balance storage performance needs with host performance requirements
Solution Approach 2:
The access delay parameters are dynamically adjusted based on detected workload types. The controller monitors workload characteristics and modifies delay periods in real-time, transitioning between different delay configurations to adapt to changing system conditions and balance the trade-off between storage performance and host performance
2Speed
If the controller increases HMB access speed to improve throughput, then data transfer rate increases, but host responsiveness decreases due to increased contentions on data bus
Solution Approach 1:
Different HMB regions are assigned different access quality characteristics through selective delay application. Critical regions that need fast access for specific workload types receive shorter delays, while less critical regions receive longer delays, creating local quality variations in access speed to optimize both throughput and host responsiveness
Solution Approach 2:
The controller monitors host response characteristics and adjusts delay parameters accordingly. By detecting workload patterns and host responsiveness metrics, the system feedback-adjusts the access delay configuration to maintain optimal balance between data transfer rate and host responsiveness
Data Source
AI summary
A system and method for reducing performance penalties of a host that is supplying a host memory buffer (HMB) for use by a storage device. The method may include modeling desired HMB access timing by the storage device in an initial offline analysis for multiple classes of workloads, periodically updating the access timing data stored in the storage device based on actual use and using the current HMB access timing information to modify storage device access to the HMB on the host. The system may include a storage device controller that quantifies different HMB access timing for different host workloads based on individual HMB regions.