HMB Controller Segmentation for Linear Addressing

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Solution Overview

Problem

Current memory systems, such as those used in portable electronic devices, face limitations in performance due to inefficient management of host memory buffers, leading to suboptimal data access and storage efficiency.

Innovation Solution

A controller and operating method that divide host memory into sub-regions, generate index values, and create an HMB map table to map virtual addresses to physical addresses, allowing for continuous and efficient access to host memory buffers, thereby improving memory system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If host memory is allocated as a buffer for memory system, then data storage capacity is improved, but data access efficiency deteriorates due to discontinuous allocation

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata access efficiency
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The host memory buffer is divided into multiple sub-HMB regions, each mapped to continuous physical address spaces. This segmentation allows the system to maintain continuous addressability within each sub-region while utilizing the overall discontinuous host memory allocation, thereby resolving the contradiction between storage capacity and access efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An HMB map table is introduced as an intermediary data structure that maps virtual addresses to physical addresses across discontinuous host memory regions. This map table enables transparent address translation, allowing efficient continuous access patterns while utilizing discontinuous physical memory allocation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If host memory regions are allocated discontinuously, then memory utilization flexibility is improved, but address linearity deteriorates

Engineering Contradiction:
Improvememory utilization flexibilityVSAvoidaddress linearity
Core Design Contradiction:
Adaptability or versatilityVSShape

Solution Approach 1:

The system introduces a virtual address dimension that provides linear addressing, while the physical address dimension can be discontinuous. The HMB map table performs translation between these dimensions, allowing the system to maintain flexible discontinuous physical allocation while presenting linear addresses to the host system.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The HMB map table serves as an intermediary that decouples virtual linear addressing from physical discontinuous allocation. It stores mapping relationships between virtual addresses and physical addresses, enabling the system to maintain address linearity in the virtual space while utilizing flexible discontinuous physical memory regions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If host memory buffer is used without subdivision, then system complexity is reduced, but access performance to specific regions deteriorates

Engineering Contradiction:
Improvesystem complexityVSAvoidaccess performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The host memory buffer is segmented into multiple sub-HMB regions, each with its own continuous address space. This segmentation improves access performance by enabling targeted access to specific regions without requiring operations on the entire buffer, while the segmentation overhead is managed efficiently by the controller.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of managing the entire host memory buffer as a single unit, the system performs partial actions by dividing it into sub-regions and managing them independently. This allows more granular control and optimization of memory access patterns, improving overall productivity while the added complexity is kept manageable.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11036640B2Controller, operating method thereof, and memory system including the same
Publication Date: 2021.06.15 SK HYNIX INC
  • US11036640B2 patent drawing
  • US11036640B2 patent drawing
  • US11036640B2 patent drawing

AI summary

A controller, an operating method thereof, and a memory system including the same are disclosed. The controller includes a controller for controlling a nonvolatile memory device according to a request from a host with a host memory. The controller includes an address unit configured to divide regions of the host memory, which is allocated as a host memory buffer (HMB), to generate a plurality of sub HMB regions, determine index values of the plurality of sub HMB regions, and generate an HMB map table by mapping virtual addresses to the index values; and a memory control module configured to access at least one among the plurality of sub HMB regions based on the HMB map table. The virtual addresses may be set to continuous values with respect to the plurality of sub HMB regions.