Hardware Accelerator for Histogram of Gradient Descriptors

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Solution Overview

Problem

Generating histogram of oriented gradients (HoG) descriptors is computationally expensive, limiting their use to high-performance computing systems and making them inefficient for mobile applications due to the high computational cost of mathematical operations involved.

Innovation Solution

A hardware accelerator with a programmable convolution module and a HoG estimator module that computes gradient vectors and bins them into orientation bins, allowing for parallel processing and normalization, thereby reducing computational load and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional sequential processors are used to compute HoG descriptors, then the computation can be performed, but the computational cost and time consumption are excessively high

Engineering Contradiction:
ImproveHoG descriptor computation speedVSAvoidTime consumption for mathematical operations
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the HoG descriptor computation into distinct functional modules: a convolution module for computing gradient vectors, a HoG estimator module for determining orientation bins, and a HoG binning module for accumulating histogram values. This segmentation allows each module to be optimized independently and enables parallel processing, significantly reducing the time consumption associated with conventional sequential computation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces the mechanical sequential processing of mathematical operations with a specialized hardware accelerator that uses parallel architectural mechanisms. The hardware accelerator performs convolution operations, orientation calculations, and histogram binning simultaneously across multiple data elements, substituting the sequential mechanical computation with parallel hardware-based processing to dramatically reduce computation time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If high-performance computing systems are used for HoG descriptor computation, then computational accuracy is maintained, but device complexity and cost increase

Engineering Contradiction:
ImproveHoG descriptor computation accuracyVSAvoidSystem complexity for high-performance computing
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the computationally intensive HoG descriptor calculation functions from the general-purpose CPU and implements them as a dedicated hardware accelerator module. This extraction concentrates the computational complexity into a specialized unit that can be integrated into mobile devices, maintaining computation accuracy while reducing overall system complexity by offloading these tasks from the main processor.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the computational parameters by implementing fixed-point arithmetic instead of floating-point arithmetic for the hardware accelerator. This parameter change reduces the hardware resources required for computation while maintaining sufficient precision for HoG descriptor calculations, thereby reducing device complexity and power consumption while preserving measurement accuracy.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If mobile devices are used for image processing applications, then portability is improved, but computational power and energy budget are limited

Engineering Contradiction:
ImprovePortability of computing deviceVSAvoidPower consumption for image processing
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-computing and storing lookup tables for orientation bin mappings and normalization constants in the hardware accelerator. This allows the accelerator to perform rapid table lookups during image processing instead of performing complex mathematical operations in real-time, significantly reducing power consumption while maintaining computational accuracy for HoG descriptor generation on mobile devices.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9996912B2Systems, methods, and apparatuses for histogram of gradients
Publication Date: 2018.06.12 MOVIDIUS LTD
  • US9996912B2 patent drawing
  • US9996912B2 patent drawing
  • US9996912B2 patent drawing

AI summary

One of the challenges in bringing computational imaging to a mass market is that computational imaging is inherently computationally expensive. The computational challenges associated with computational imaging are apparent with the computation of a histogram of gradient descriptors. Oftentimes, generating a histogram of gradient descriptors involves computing gradients of an image, binning the gradients according to their orientation, and, optionally, normalizing the bins using a non-linear function. Because each of these operations is expensive, the histogram of gradient descriptor computations is generally computationally expensive and is difficult to implement in a power efficient manner for mobile applications. The present application discloses a computing device that can provide a low-power, highly capable computing platform for computing a histogram of gradient descriptors.