Semiconductor Hole Patterning with Nested Spacers for Fine Pitch
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Solution Overview
Problem
Existing methods face challenges in forming fine hole patterns with a line width below a critical dimension, particularly with EUV equipment being expensive and DUV multi-patterning technology being difficult, leading to limitations in pattern formation and poor profile uniformity.
Innovation Solution
A method involving the formation of a hard mask layer, sacrificial patterns, and spacers to create a hole pattern using a DUV mask, allowing for a single patterning process that reduces pitch scaling and improves uniformity, using a combination of sacrificial layers and spacers to form fine hole patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If EUV equipment is used to form fine hole patterns, then pattern resolution is improved, but production cost increases significantly
Solution Approach 1:
The patent segments the patterning process into multiple steps using DUV lithography combined with spacer formation. Instead of using a single EUV exposure step, the method divides the process into: (1) forming initial mandrels with DUV, (2) depositing spacers on mandrel sidewalls, (3) removing mandrels, and (4) repeating the process to achieve final fine pitch patterns. This segmentation allows DUV equipment to achieve EUV-level resolution at lower cost.
Solution Approach 2:
The patent transitions from planar 2D patterning to 3D spacer-based patterning. By depositing conformal spacers on the sidewalls of mandrels and then removing the mandrels, the method creates patterns in the vertical dimension that translate to fine horizontal pitch. This dimensional transition enables sub-critical dimension patterning using longer wavelength DUV light.
2Ease of manufacture
If DUV multi-patterning is used to form fine hole patterns, then production cost is reduced, but process complexity and difficulty increase
Solution Approach 1:
The patent implements a nested patterning approach where spacers are formed around mandrels, then mandrels are removed leaving only spacers, which then become new mandrels for the next spacer deposition cycle. Each patterning cycle is nested within the previous structure, systematically reducing pitch while maintaining process control and avoiding the complexity of multiple independent lithography alignments.
Solution Approach 2:
The patent introduces sacrificial mandrels as intermediary structures that facilitate spacer formation and pattern transfer. These mandrels serve as temporary mediators that enable precise spacer placement and are subsequently removed, leaving clean patterns without requiring complex direct lithographic multi-patterning alignment procedures.
3Length of moving object
If smaller pattern size is achieved, then pitch is reduced, but profile uniformity deteriorates
Solution Approach 1:
The patent employs self-aligned spacer formation where the spacer width is determined by the conformal deposition thickness rather than lithographic dimensions. The spacer automatically forms with uniform width around the mandrel sidewalls, and this self-aligned approach eliminates overlay errors and maintains profile uniformity even as pattern size reduces, since the critical dimension is controlled by atomic layer deposition or chemical vapor deposition thickness rather than optical resolution.
Data Source
AI summary
A method for forming a hole pattern includes forming a hard mask layer over an etch target layer; forming a first sacrificial pattern including a preliminary hole pattern over the hard mask layer; forming a first sacrificial spacer on an inner wall of the first sacrificial pattern; forming a second sacrificial pattern to gap-fill between the first sacrificial spacers; removing the first sacrificial pattern; forming second sacrificial spacers on both sidewalls of a pillar pattern which is formed of the first sacrificial spacer and the second sacrificial pattern; removing the second sacrificial pattern; forming a hard mask pattern by using the first and second sacrificial spacers as an etch barrier and etching the hard mask layer; and forming an etch pattern including a hole pattern by using the hard mask pattern as an etch barrier and etching the etch target layer.