Hollow-Channel FET Structure for Short-Channel Control
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Solution Overview
Problem
The challenge of reducing transistor size while maintaining performance is exacerbated by the short channel effect, which causes issues such as threshold voltage variation and carrier velocity saturation due to decreased contact area between the gate electrode and the channel.
Innovation Solution
A field effect transistor with a multi-bridge channel configuration featuring a hollow closed cross-sectional structure and a gate electrode surrounding all sides of the channel, utilizing two-dimensional semiconductor materials like graphene or transition metal dichalcogenides, and a method of manufacturing that includes alternately stacking sacrificial layers and insulating layers to form channels and electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor size is reduced to increase integration density, then the contact area between the gate electrode and the channel decreases, but this causes short channel effects such as threshold voltage variation and carrier velocity saturation
Solution Approach 1:
The patent transitions from a conventional planar channel structure to a three-dimensional hollow closed cross-sectional channel structure. This dimensional change allows the channel to wrap around the gate electrode, increasing the gate-channel contact area from a single plane to multiple surfaces, thereby improving gate control without increasing the footprint area and mitigating short channel effects
Solution Approach 2:
The channel structure is designed to surround and enclose the gate electrode, creating a nested configuration where the gate is positioned within the hollow channel structure. This nesting arrangement maximizes the gate-channel interface area, enhancing electrostatic control over the channel while maintaining a compact device footprint
2Speed
If the channel length is reduced to improve device speed, then the gate control over the channel weakens, but this leads to increased leakage current and short channel effects
Solution Approach 1:
By transforming the channel from a linear planar structure to a three-dimensional hollow closed cross-section structure, the patent achieves enhanced gate control over the channel. The gate electrode contacts the channel from multiple directions (top, bottom, and sides), providing superior electrostatic control that suppresses leakage current even when the channel length is reduced for faster device operation
Solution Approach 2:
The patent employs two-dimensional semiconductor materials (such as MoS2, WS2, WSe2, or black phosphorus) for the channel structure. These materials provide high carrier mobility for fast device speed while their atomic-layer thickness enables excellent gate control, reducing off-state leakage current. The combination of 2D material properties with the hollow closed cross-sectional geometry creates a composite structure that simultaneously achieves high speed and low leakage
Data Source
AI summary
Disclosed are a field effect transistor and a method of manufacturing the same. The field effect transistor includes a source electrode on a substrate, a drain electrode separated from the source electrode, and channels connected between the source electrode and the drain electrode, gate insulating layers, and a gate electrode. The channels may have a hollow closed cross-sectional structure when viewed in a first cross-section formed by a plane across the source electrode and the drain electrode in a direction perpendicular to the substrate. The gate insulating layers may be in the channels. The gate electrode may be insulated from the source electrode and the drain electrode by the gate insulating layers.