Hollow Conductive Via Lining for Semiconductor Substrates
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Solution Overview
Problem
Existing methods for producing electrical vias in microelectronic and microsystems technology face challenges such as high material costs, contamination issues with metals like copper, and difficulties in achieving reliable conductivity and mechanical stability, especially in three-dimensional integration and high aspect ratios, limiting flexibility and scalability.
Innovation Solution
A method involving the formation of a hollow conductive structure within the via, using a metal-containing lining deposited in a vacuum environment with multiple metal layers applied without interruption, employing metal-organic chemical vapor deposition for conformal layer formation, and a passivation layer to maintain mechanical stability and reduce material usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal-containing conductive material is used to fill the via, then electrical conductivity is achieved, but material costs increase and contamination issues arise
Solution Approach 1:
The patent replaces expensive metal fill materials with a thin metal-containing lining that serves the essential conductivity function. The lining is sufficient to provide electrical connection without requiring bulk metal filling, thereby reducing material costs while maintaining the necessary electrical conductivity for via functionality.
Solution Approach 2:
The patent applies metal-containing lining only where absolutely necessary - as a thin layer on the via walls and bottom - rather than filling the entire via volume with metal. This localized application provides the required electrical conductivity at the critical interfaces while minimizing overall metal consumption and associated costs.
2Area of stationary object
If via dimensions are reduced to save space and material costs, then area utilization improves, but manufacturing precision and reliability become more difficult to achieve
Solution Approach 1:
The patent employs a composite structure consisting of multiple layers including insulation layer, metal-containing lining, and optional additional layers. This composite approach allows precise control of via properties even at reduced dimensions, as each layer contributes specific functions that collectively ensure manufacturing precision and reliability in small-scale vias.
Solution Approach 2:
The patent utilizes metal-organic chemical vapor deposition to precisely control the thickness and properties of the metal-containing lining layer. By controlling deposition parameters, the process achieves high manufacturing precision in forming the conductive path within the via, enabling reliable electrical connection even when via dimensions are reduced.
3Reliability
If metal layers are deposited to ensure conductivity, then electrical connection is improved, but mechanical stress and adhesion problems increase
Solution Approach 1:
The patent applies metal-containing lining only locally on the via walls and bottom surfaces where electrical connection is required, rather than creating a continuous thick metal layer throughout the via. This localized metal application provides sufficient electrical conductivity while minimizing the overall metal content that could generate mechanical stress and adhesion problems.
Solution Approach 2:
The via structure comprises a composite of insulation material and metal-containing lining, where each material contributes its advantageous properties. The insulation layer provides mechanical stability and stress relief, while the thin metal lining provides electrical conductivity, creating a balanced structure that addresses both electrical and mechanical requirements.
4Reliability
If complex production processes are used to achieve reliable via connectivity, then connection reliability improves, but device complexity and production time increase
Solution Approach 1:
The patent employs metal-organic chemical vapor deposition as a continuous process that deposits the metal-containing lining in a single uninterrupted step. This continuous deposition method ensures uniform and reliable metal layer formation throughout the via structure, achieving high connectivity reliability while simplifying the production process by eliminating multiple separate deposition steps.
Solution Approach 2:
The patent utilizes controllable deposition parameters in the metal-organic chemical vapor deposition process to achieve reliable via connectivity through a simplified single-step process. By optimizing temperature, pressure, and precursor flow parameters, the process reliably forms the necessary conductive path without requiring complex multi-step procedures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces material costs, minimizes mechanical stress, and enhances flexibility in via placement and production timing, enabling efficient and reliable electrical connectivity in complex micro-technical structures with high aspect ratios while maintaining mechanical stability.
Implementation Method 1
employing metal-organic chemical vapor deposition for conformal layer formation
Implementation Method 2
using a metal-containing lining deposited in a vacuum environment
Data Source
AI summary
A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.