Hollow Vernier Key Patterns for Optical Overlay Measurement
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Solution Overview
Problem
Conventional overlay vernier keys in semiconductor manufacturing have insufficient line width, making it difficult to measure overlays accurately with optical equipment and leading to reading errors due to size differences between vernier keys and cell region patterns.
Innovation Solution
The development of a semiconductor substrate with vernier patterns in a hollow polygonal shape, arranged closely to generate a detectable signal for optical overlay measuring equipment, ensuring the same size and pitch as cell region patterns, and using spacer-shaped etch masks for precise overlay measurement and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the overlay vernier key is formed with a larger size to be measurable by optical equipment, then the measurement capability is improved, but the line width becomes insufficient for highly integrated devices with decreased margins
Solution Approach 1:
The overlay vernier key is segmented into multiple vernier patterns (first, second, third, and fourth vernier patterns) arranged in a specific configuration. Each vernier pattern has a defined width and spacing, allowing the overall structure to provide sufficient measurement signal while maintaining appropriate line widths for highly integrated devices with decreased margins.
2Manufacturing precision
If the overlay vernier key line width is increased to be properly formed, then the pattern formation is improved, but the optical overlay measuring equipment cannot detect the signal due to insufficient contrast
Solution Approach 1:
Multiple vernier patterns are merged into a single overlay vernier key structure with specific spacing relationships. The first and second vernier patterns are spaced apart, as are the third and fourth patterns, creating a combined structure that provides sufficient optical contrast for detection while maintaining proper pattern formation in highly integrated devices.
3Measurement precision
If the overlay vernier key size is made large enough for optical detection, then the signal strength is improved, but reading errors occur due to size differences between vernier keys and cell region patterns
Solution Approach 1:
The vernier patterns are designed with specific local dimensions and spacing characteristics. Each vernier pattern has a width that is a specific fraction of the pitch between corresponding patterns, creating local quality variations that provide sufficient signal strength for detection while preventing reading errors through proper size relationships with cell region patterns.
Data Source
AI summary
Methods are disclosed for fabricating an overlay vernier key. A method includes forming a pattern layer and an insulating layer over a semiconductor substrate. The insulating layer is etched to form insulating layer patterns to partially expose the pattern layer. Spacers are formed on sidewalls of the insulating layer patterns. The insulating layer patterns are removed while leaving the spacers to obtain a spacer-shaped etch mask. The pattern layer is etched using the spacer-shaped etch mask to form vernier patterns. At least one of the vernier patterns has a hollow shape.