Home Node Coherence Control for Conditional Data Writes

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current data transfer protocols in coherent systems, such as the AMBA CHI protocol, face challenges in ensuring data consistency and coherence across nodes, particularly in handling conditional write operations and maintaining the integrity of data items across multiple nodes.

Innovation Solution

The proposed solution involves a set of data handling nodes with master nodes holding copies of data items associated with indicator information to track coherency states, a home node for serializing data access and maintaining coherence, and slave nodes including main memory, where requesting nodes can send conditional requests for data writes. The target node responds with success or failure indicators based on execution conditions, ensuring data consistency and integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional data transfer protocols are used to manage data coherence across nodes, then data consistency can be maintained, but system complexity and overhead increase

Engineering Contradiction:
Improvedata consistencyVSAvoidprotocol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the coherence management functionality from individual nodes and centralizes it in dedicated Home Nodes. This separation allows master nodes to perform simple read/write operations while Home Nodes handle the complex coherence protocol implementation, reducing protocol complexity at the master node level while maintaining data consistency through centralized control.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces Home Nodes as intermediary components between master nodes and slave nodes. These Home Nodes act as mediators that receive coherence requests from master nodes, manage the coherence state, and coordinate with slave nodes to maintain data consistency, thereby simplifying the protocol implementation at master nodes while ensuring reliable data coherence.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If conditional write operations are implemented to optimize data handling, then write efficiency improves, but the risk of data loss increases when conditions fail

Engineering Contradiction:
Improvewrite efficiencyVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback mechanisms where master nodes receive status information from Home Nodes about the current coherence state and write conditions. This feedback allows master nodes to make informed decisions about whether to proceed with conditional writes, and the system provides follow-up actions or notifications when write conditions are not met, preventing data loss while maintaining write efficiency.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent prepares for potential write failures by implementing beforehand cushioning through validation checks and condition verification before executing conditional writes. The system checks coherence states and write conditions in advance, and has prepared recovery mechanisms in place, so that if a conditional write fails, the system can prevent data loss without compromising overall write efficiency.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Productivity

If multiple master nodes access shared data simultaneously, then system throughput increases, but coherence conflicts and data inconsistency arise

Engineering Contradiction:
Improvesystem throughputVSAvoiddata coherence
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces Home Nodes as intermediary components that mediate between multiple master nodes accessing shared data. Home Nodes receive coherence requests from master nodes, track the coherence state of shared data, and coordinate access to prevent conflicts. This mediation enables multiple master nodes to operate simultaneously while maintaining data coherence through centralized state management.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts coherence management responsibilities from individual master nodes and centralizes them in Home Nodes. This separation allows master nodes to focus on high-throughput data operations while Home Nodes handle the complex coherence protocol implementation, enabling simultaneous access by multiple master nodes without compromising data coherence.

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If coherence validation is performed for every data operation, then data consistency is ensured, but operation latency increases

Engineering Contradiction:
Improvedata consistencyVSAvoidoperation latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements partial validation by performing full coherence checks only when necessary based on the operation type and current coherence state. For operations that are guaranteed to maintain coherence or for data that is already in a consistent state, the system performs reduced validation or no validation at all, thereby ensuring data consistency while minimizing operation latency through selective validation.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11445020B2Circuitry and method
Publication Date: 2022.09.13 ARM LTD
  • US11445020B2 patent drawing
  • US11445020B2 patent drawing
  • US11445020B2 patent drawing

AI summary

Circuitry comprises a set of data handling nodes comprising: two or more master nodes each having respective storage circuitry to hold copies of data items from a main memory, each copy of a data item being associated with indicator information to indicate a coherency state of the respective copy, the indicator information being configured to indicate at least whether that copy has been updated more recently than the data item held by the main memory; a home node to serialise data access operations and to control coherency amongst data items held by the set of data handling nodes so that data written to a memory address is consistent with data read from that memory address in response to a subsequent access request; and one or more slave nodes including the main memory; in which: a requesting node of the set of data handling nodes is configured to communicate a conditional request to a target node of the set of data handling nodes in respect of a copy of a given data item at a given memory address, the conditional request being associated with an execution condition and being a request that the copy of the given data item is written to a destination node of the data handling nodes; and the target node is configured, in response to the conditional request: (i) when the outcome of the execution condition is successful, to write the data item to the destination node and to communicate a completion-success indicator to the requesting node; and (ii) when the outcome of the execution condition is a failure, to communicate a completion-failure indicator to the requesting node.