Homogeneous Source/Drain Contact Structure for Lower RC Delay
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Solution Overview
Problem
Existing integrated circuit (IC) technologies face challenges with increased resistance and resistive-capacitive delay (RC delay) due to smaller back-end-of-line (BEOL) interconnect features, particularly in source/drain contact vias and metal lines, which are formed with different metal fill materials leading to heterogeneous interfaces.
Innovation Solution
A method is introduced to form an integrated contact feature with a continuous and homogeneous source/drain contact via and metal line by using a sacrificial plug to create a dual-damascene opening, followed by depositing a barrier and metal fill layer, eliminating heterogeneous interfaces and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different metal fill materials are used for source/drain contact vias and metal lines, then each material can be optimized for its specific function, but heterogeneous interfaces are created leading to increased resistance and RC delay
Solution Approach 1:
The patent merges the source/drain contact via and metal line into a single continuous conductive feature filled with the same metal material (copper or ruthenium). This eliminates the heterogeneous interface between different metal fill materials, reducing contact resistance and RC delay while maintaining functional optimization through the continuous conductive path.
Solution Approach 2:
The patent applies homogeneity by using the same metal fill material throughout the entire integrated contact feature, from the source/drain contact via through the metal line. This homogeneous structure eliminates interface resistance caused by material transitions, directly addressing the resistance issue while simplifying the overall structure.
2Productivity
If smaller interconnect features are used to increase functional density, then more devices can be packed per chip area, but resistance and RC delay increase
Solution Approach 1:
By merging the contact via and metal line into a single continuous conductive feature, the patent reduces the number of interfaces and transitions in the signal path. This continuous structure minimizes RC delay even as feature sizes decrease, allowing higher functional density without compromising signal integrity.
Solution Approach 2:
The patent changes the material parameter by using highly conductive metals (copper or ruthenium) with lower resistivity than traditional materials. This parameter change compensates for the increased resistance inherent in smaller interconnect features, maintaining signal speed while increasing functional density.
Data Source
AI summary
A method according to the present disclosure includes receiving a workpiece that includes a first source/drain feature, a first dielectric layer over the first source/drain feature, and a source/drain contact disposed in the first dielectric layer and over the first source/drain feature. The method further includes depositing a second dielectric layer over the source/drain contact and the first dielectric layer, forming a source/drain contact via opening through the second dielectric layer to expose the source/drain contact, depositing a sacrificial plug in the source/drain contact via opening, depositing a third dielectric layer over the second dielectric layer and the sacrificial plug, forming a trench in the third dielectric layer to expose the sacrificial plug, removing the sacrificial plug to expose the source/drain contact via opening, and after the removing of the sacrificial plug, forming an integrated conductive feature into the trench and the exposed source/drain contact via opening.