Homogeneous Source/Drain Contact Via for Lower RC Delay
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Solution Overview
Problem
Existing integrated circuit (IC) interconnect features, such as source/drain contact vias and metal lines, face increased resistance and resistive-capacitive (RC) delay due to heterogeneous interfaces between different metal fill materials, which complicates the reduction of RC delay as technology nodes shrink.
Innovation Solution
A method is introduced to form an integrated contact feature with a continuous and homogeneous source/drain contact via and metal line by using a sacrificial plug to create a dual-damascene opening, allowing for the deposition of a barrier and metal fill layer without a heterogeneous interface, thereby reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heterogeneous interfaces between different metal fill materials are used in source/drain contact vias and metal lines, then existing interconnect features can be formed with current fabrication processes, but resistance and resistive-capacitive delay increase
Solution Approach 1:
The patent applies homogeneity by forming a continuous metal fill layer that extends through both the contact via and the metal line, eliminating the heterogeneous interface between different metal materials. This single continuous metal layer (e.g., copper) replaces the traditional interface between contact via metal and metal line metal, reducing resistance and RC delay while maintaining compatibility with existing fabrication processes
2Productivity
If smaller interconnect features are created to increase functional density, then production efficiency improves and costs decrease, but resistance and RC delay increase
Solution Approach 1:
By creating a homogeneous continuous metal layer in smaller interconnect features, the patent reduces the harmful effects of heterogeneous interfaces that become more significant at smaller dimensions. This allows continued scaling to increase functional density while mitigating the increase in resistance and RC delay that would otherwise occur
3Ease of manufacture
If heterogeneous metal fill materials are used in contact vias and metal lines, then existing fabrication processes can be maintained, but the interface between different metals complicates RC delay reduction
Solution Approach 1:
The patent merges the contact via fill and metal line fill into a single continuous metal layer, eliminating the need for separate metal fill processes and interface management. This approach maintains ease of manufacture by using standard deposition techniques while reducing device complexity by removing the heterogeneous interface
Solution Approach 2:
By using a single metal material continuously from the contact via through the metal line, the patent simplifies the interface structure while remaining compatible with existing fabrication processes, thus reducing RC delay without sacrificing manufacturability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in lower resistance and reduced RC delay by eliminating the heterogeneous interface between the source/drain contact via and the metal line, enhancing the performance of IC interconnects.
Implementation Method 1
The sacrificial plug is removed to expose the source/drain contact via opening
Implementation Method 2
A barrier layer and a metal fill layer are deposited into the dual-damascene opening
Data Source
AI summary
A method according to the present disclosure includes receiving a workpiece that includes a first source/drain feature, a first dielectric layer over the first source/drain feature, and a source/drain contact disposed in the first dielectric layer and over the first source/drain feature. The method further includes depositing a second dielectric layer over the source/drain contact and the first dielectric layer, forming a source/drain contact via opening through the second dielectric layer to expose the source/drain contact, depositing a sacrificial plug in the source/drain contact via opening, depositing a third dielectric layer over the second dielectric layer and the sacrificial plug, forming a trench in the third dielectric layer to expose the sacrificial plug, removing the sacrificial plug to expose the source/drain contact via opening, and after the removing of the sacrificial plug, forming an integrated conductive feature into the trench and the exposed source/drain contact via opening.