Homogeneous Delay Line Circuit Without Exit Tree Delay
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Solution Overview
Problem
Conventional variable delay circuits face issues with predictability, power consumption, and susceptibility to negative bias temperature instability (NBTI) degradation due to complex exit tree circuitry, which increases layout area and introduces duty cycle distortion.
Innovation Solution
A delay-locked loop (DLL) circuit with a homogenous delay line and integrated measurement initialization circuitry, using identical delay elements and eliminating exit tree circuitry to simplify the architecture, reduce forward path delay, and mitigate NBTI degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional exit tree circuitry is used to tap output signals, then signal routing flexibility is improved, but forward path delay increases and predictability decreases
Solution Approach 1:
The patent removes the complex exit tree circuitry from the delay line architecture. Instead of using multiple layers of circuit elements to tap output signals, the invention directly outputs signals from selected delay elements, eliminating the additional delay and unpredictability introduced by exit tree logic while maintaining the ability to route signals to different outputs.
Solution Approach 2:
The delay line is segmented into multiple identical delay elements, each capable of being independently controlled to pass or block signals. This segmentation allows flexible signal routing without requiring complex exit tree circuitry, as each segment can be configured to achieve the desired delay and routing combination.
2Adaptability or versatility
If different types of circuit elements are used in exit tree circuitry, then signal routing capability is improved, but delay predictability decreases
Solution Approach 1:
The patent employs homogenous delay elements throughout the delay line, where each element is identical in structure and characteristics. This homogeneity ensures that each delay element contributes a predictable and consistent delay amount, eliminating the unpredictability introduced by mixing different types of circuit elements in the exit tree while maintaining full signal routing capability through controlled configuration.
3Adaptability or versatility
If exit tree circuitry is included, then signal tapping flexibility is improved, but power consumption increases
Solution Approach 1:
The patent extracts and removes the power-consuming exit tree circuitry from the architecture. Signal tapping flexibility is maintained through the configurable delay elements themselves, which can be controlled to pass signals to different outputs without requiring additional layers of circuit elements that would consume power.
4Adaptability or versatility
If exit tree circuitry is used, then signal routing options are improved, but layout area increases
Solution Approach 1:
The patent removes the exit tree circuitry that occupies significant layout area. The signal routing options previously provided by the exit tree are achieved more efficiently by configuring the delay elements themselves, reducing the overall layout area required for the delay circuit while maintaining full routing flexibility.
5Adaptability or versatility
If complex exit tree circuitry is implemented, then signal tapping capability is improved, but susceptibility to NBTI degradation increases
Solution Approach 1:
The patent uses identical delay elements throughout the circuit, ensuring uniform stress distribution and degradation characteristics. By eliminating the exit tree circuitry with its mixed circuit elements, the invention removes the components most susceptible to NBTI degradation, improving overall reliability while maintaining signal tapping capability through the configurable homogeneous delay elements.
Data Source
AI summary
Apparatuses and methods for delaying signals using a delay line are described. An example apparatus includes a controller configured to in a first mode, set a delay length, and, in a second mode, to determine an initial delay. The apparatus further including a delay line circuit coupled to the controller and includes delay elements. Each of the delay elements includes delay gates that are the same type of delay gate. The delay line circuit is configured to, in the first mode propagate a signal through one or more of the delay elements to provide a delayed signal. The delay line circuit is further configured to, in the second mode, propagate a pulse signal through one or more of the delay elements and provide a corresponding output signal from each of the one or more delay elements responsive to the pulse signal reaching an output of the corresponding delay element.


